PCB Trace Width Calculation for Current, Copper Thickness, and Impedance

User question

how to calculate trace width for pcb design

Artificial Intelligence Response

Direct answer to the question

To calculate PCB trace width, first determine what is driving the width:

• For a power/current-carrying trace, width is mainly set by:
  • maximum current,
  • allowable temperature rise,
  • copper thickness,
  • and whether the trace is on an external or internal layer.
• For a high-speed or RF trace, width is usually set by controlled impedance, not by current alone. In that case you must use the PCB stackup and an impedance calculator/field solver. (ipc.org)

For a quick manual estimate of a current-carrying trace, the commonly used IPC-2221 form is:

\[ A = \left(\frac{I}{k \cdot \Delta T^{0.44}}\right)^{\frac{1}{0.725}} \]

\[ W = \frac{A}{t} \]

Where:

• \(A\) = required copper cross-sectional area,
• \(I\) = current in amperes,
• \(\Delta T\) = allowed temperature rise in °C,
• \(t\) = copper thickness in mils,
• \(k = 0.048\) for external layers,
• \(k = 0.024\) for internal layers. (digikey.com)

If your board uses 1 oz copper, a practical nominal thickness is 35 µm, about 1.4 mil. (jlcpcb.com)

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Detailed problem analysis

The correct engineering workflow is:

1. Define the trace function

   • If it is a supply rail, motor path, LED current path, or power return, size it for current, heating, and voltage drop.
   • If it is USB, Ethernet, DDR, RF, LVDS, etc., size it for impedance first. (jlcpcb.com)

2. For current-based sizing, gather these inputs

   • maximum continuous current \(I\),
   • acceptable temperature rise \(\Delta T\),
   • copper weight/thickness,
   • internal vs. external layer,
   • trace length if you also need voltage-drop verification. DigiKey’s IPC-2221 calculator explicitly uses these variables and also reports resistance, voltage drop, and power loss when length is included. (digikey.com)

3. Use the IPC-2221 formula for a first-pass hand calculation

   • External layers dissipate heat better, so they can be narrower for the same current.
   • Internal layers need significantly more width because heat removal is poorer. (digikey.com)

4. Then verify voltage drop

   • Even if a trace is thermally acceptable, it may still be too resistive for a low-voltage rail.
   • This is especially important for 5 V, 3.3 V, 1.8 V, and high-current point-of-load rails. IPC-2152 includes explicit voltage-drop analysis topics, and practical calculators also expose resistance and voltage drop for this reason. (ipc.org)

5. Finally check manufacturability

   • Your calculated width must be greater than the PCB fabricator’s minimum width and spacing rules.
   • As current copper weight increases, minimum manufacturable trace width often increases as well. (jlcpcb.com)

Worked example

Suppose you need a 3 A trace on an external layer, with 1 oz copper and an allowed temperature rise of 20°C.

Using the IPC-2221 relation:

• required area \(A \approx 48.7\ \text{mil}^2\),
• width \(W \approx 35.3\ \text{mil}\),
• which is about 0.90 mm for 1 oz copper.

If the same 3 A trace is routed on an internal layer with the same copper and temperature-rise limit, the required width becomes about 91.9 mil, or about 2.33 mm. That large difference is why moving a power trace from top layer to an inner layer often forces a major width increase.

Copper thickness conversion

Common nominal values are:

Copper weight	Approx. thickness
0.5 oz	17.5 µm
1 oz	35 µm
2 oz	70 µm

A thicker copper layer reduces the width required for the same current because the conductor cross-sectional area increases. (jlcpcb.com)

What many beginners miss

The trace-width calculation is not only a math exercise. Real performance also depends on:

• copper around the trace,
• adjacent planes,
• board stackup,
• airflow,
• enclosure conditions,
• and thermal paths into the rest of the PCB. AdvancedPCB’s 2026 guidance explicitly emphasizes that IPC-based calculators are estimates and do not replace full thermal understanding of the actual product. (advancedpcb.com)

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Current information and trends

Current industry practice is to treat IPC-2221 as a quick estimation method and IPC-2152 as the more complete current-carrying-capacity guide. The official IPC-2152 material shows dedicated sections for conductor sizing charts, still-air environments, copper weight, board material, copper planes, voltage-drop analysis, vias, and high-speed topics, which reflects a more realistic thermal-treatment framework than a single empirical formula. (ipc.org)

On the manufacturing side, current fab guidance continues to favor not designing at the absolute minimum unless density forces it. For example, PCBWay states a 3 mil minimum width/spacing capability but recommends 6 mil or above to reduce cost and manufacturing risk, while JLCPCB’s help content lists 4 mil minimum for 1–2 layer 1 oz FR-4 and notes wider minimums for heavier copper. (pcbway.com)

For controlled-impedance designs, modern fab tools now directly compute trace width from target impedance, layer, thickness, copper weight, spacing, and ground reference geometry. JLCPCB’s impedance calculator documentation, updated April 3, 2026, explicitly uses those stackup-dependent parameters, which reinforces that high-speed trace width should not be chosen from current tables alone. (jlcpcb.com)

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Supporting explanations and details

A useful engineering way to think about trace width is:

• Current capacity is a thermal problem.
• Voltage drop is a resistance problem.
• Controlled impedance is an electromagnetic field / transmission-line problem.

The same copper trace may be acceptable under one criterion and fail another. For example:

• a 3.3 V power rail may over-drop before it overheats,
• a USB trace may carry almost no current but still require a precise width for impedance,
• a narrow trace may pass DRC electrically but violate fab capability or yield targets. (digikey.com)

A practical analogy is this:

• Making a trace wider is like increasing pipe diameter:
  • less resistance,
  • lower heating,
  • lower voltage drop.
• But for high-speed signals, width is also part of the “pipe geometry” that sets the wave behavior, so wider is not automatically better. (jlcpcb.com)

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Ethical and legal aspects

For ordinary hobby boards, trace width is mostly a reliability matter. For safety-critical, medical, automotive, industrial, or high-power products, undersized traces can contribute to overheating, reduced lifetime, or catastrophic failure. From an engineering ethics standpoint, trace sizing should be documented, reviewed, and validated rather than guessed. IPC-2152 itself describes its role as a guide for determining appropriate conductor sizes based on current capacity and acceptable temperature rise. (ipc.org)

Also note that trace width does not replace other safety constraints. For higher-voltage designs, you must separately check clearance, creepage, copper-to-edge spacing, annular ring, and DRC/DFM constraints against the relevant standards and your fabricator’s rules. PCBWay and JLCPCB both explicitly stress DRC/DFM compliance for manufacturability and reliability. (pcbway.com)

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Practical guidelines

Use this practical method:

1. Choose the governing case

   • DC power rail, pulsed current path, or high-speed signal.

2. For power traces

   • Start with current,
   • pick allowable temperature rise,
   • choose copper weight,
   • apply IPC-2221 for a quick estimate,
   • then verify voltage drop and manufacturability. (digikey.com)

3. Add design margin

   • Do not route exactly at the computed minimum unless space is extremely constrained.
   • Wider traces improve margin for plating variation, local heating, and future load growth. This is consistent with current fab guidance that recommended values are usually larger than bare process minimums. (pcbway.com)

4. Use external layers for heavy current when possible

   • They cool better and typically require much less width than internal traces. (digikey.com)

5. Increase copper weight if routing area is limited

   • Moving from 1 oz to 2 oz can reduce required width for the same current, though fabrication minimums and costs may change. JLCPCB’s published design rules show heavier copper also pushes minimum trace/space upward. (jlcpcb.com)

6. For high-speed traces

   • Use the fabricator’s stackup-based impedance calculator,
   • not a current-width table. (jlcpcb.com)

7. Run DRC and DFM before release

   • That catches minimum width, spacing, edge clearance, and via-rule violations before fabrication. (pcbway.com)

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Possible disclaimers or additional notes

• IPC-based calculations are engineering estimates, not guarantees.
• Real boards may run cooler or hotter depending on copper pours, nearby planes, airflow, and enclosure conditions.
• If the design is high current, compact, enclosed, or safety critical, validate with:
  • thermal simulation,
  • bench current loading,
  • infrared measurement,
  • and voltage-drop measurement on prototypes. AdvancedPCB explicitly warns that calculator results do not replace full system-level thermal validation. (advancedpcb.com)

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Suggestions for further research

If you want to go beyond first-pass sizing, the next topics worth studying are:

• IPC-2152 conductor sizing charts for more realistic thermal behavior,
• via current capacity for layer transitions,
• IR-drop analysis for low-voltage power rails,
• controlled-impedance routing for USB, Ethernet, DDR, and RF,
• thermal relief and copper-plane interaction,
• fab-specific DFM rules for heavy copper boards. (ipc.org)

A very practical next step is to combine:

• one IPC-style trace-width calculator for power traces,
• and your PCB fabricator’s impedance calculator for signal traces. (digikey.com)

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Brief summary

To calculate PCB trace width correctly:

• Use current + temperature rise + copper thickness + layer location for power traces.
• Use the IPC-2221 formula for a quick hand estimate.
• Prefer the broader IPC-2152 approach for serious design work.
• Always verify voltage drop, fab capability, and DRC/DFM.
• For high-speed signals, width is usually determined by impedance and stackup, not current. (digikey.com)

If you want, I can also give you:

1. a simple calculator formula in mm,
2. a trace-width table for 1 oz copper, or
3. a worked example for your exact current and copper thickness.

Disclaimer: The responses provided by artificial intelligence (language model) may be inaccurate and misleading. Elektroda is not responsible for the accuracy, reliability, or completeness of the presented information. All responses should be verified by the user.