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Nie, dziękuję Przekieruj mnie tambk7321n connected tx rx ram hk32f030mf
Device background
• BK7321N – Beken Wi-Fi/BT-LE SoC (same silicon family as BK7231N)
– 32-bit Xtensa core @ 120 MHz
– ≈ 256 kB RAM + up to 2 MB embedded flash (varies by module)
• HK32F030MF – HKMicro ARM Cortex-M0, STM32F030-pin/-register compatible
– 48 MHz max, 16 kB flash / 2 kB SRAM
UART instance selection
• BK7321N has two UARTs:
– UART1 (P11/P10) hard-wired to boot ROM console, noisy when the RF stack starts.
– UART2 (P0/P1) is usually free → preferred for user link.
• HK32F030MF (TSSOP20 “MF4P6” version) exposes USART1 in two alternate-function pin pairs:
– PA9/PA10 (AF1, crystal-friendly)
– PB6/PB7 (AF0) if PA pins are busy.
Electrical interface
• Both I/Os are 3 V3 CMOS; current surges of BK7321N Wi-Fi radio can hit 300 mA – keep the 3 V3 rail low-impedance and decouple (10 µF + 100 nF next to the module).
• Keep TX/RX traces < 50 mm when possible; add series 33 Ω resistors if > 150 mm or routed near relays/triacs.
Firmware configuration example
BK7321N (OpenBeken SDK snippet)
bk_uart_config_t ucfg = {
.baud_rate = 115200,
.data_bits = UART_DATA_8_BITS,
.parity = UART_PARITY_NONE,
.stop_bits = UART_STOP_BITS_1,
.flow_ctrl = UART_FLOW_CTRL_DISABLED
};
bk_uart_init(BK_UART_2, &ucfg);
HK32F030MF (HK32 HAL, STM32-compatible)
huart1.Instance = USART1;
huart1.Init.BaudRate = 115200;
huart1.Init.WordLength = UART_WORDLENGTH_8B;
huart1.Init.StopBits = UART_STOPBITS_1;
huart1.Init.Parity = UART_PARITY_NONE;
huart1.Init.Mode = UART_MODE_TX_RX;
HAL_UART_Init(&huart1);
Memory budgeting & buffering
• HK32F030MF has only 2 kB RAM – RX/TX buffers must stay small (≤ 128 B each).
• Implement a circular buffer or stream parser; never allocate large structs on the stack.
• On BK7321N side, RAM is plentiful; perform JSON/HTTP/MQTT parsing there and forward only compact, binary payloads to the HK MCU.
Recommended application-layer packet
[0x55] [LEN] [CMD] [DATA…] [CRC-8] [0xAA]
– Allows the HK MCU to pre-allocate exactly LEN bytes.
– CRC-8 (Dallas/Maxim or CRC-8-ITU) fits in one byte, cheap to compute.
Diagnostics
• USB-to-UART dongle on either side to break the link and sniff traffic.
• Logic analyser for baud/format mismatches (garbled ASCII usually means one side defaulted to 3 Mbaud boot log).
• -fstack-usage
(GCC/Clang) and map file to watch HK32’s RAM/stack headroom (< 200 B free → raise alert).
• Why not use SPI/I²C instead of UART?
– BK7321N SDK treats UART as first-class, already interrupt/DMA capable; SPI master on BK side is less documented.
• RAM vs. Flash naming confusion: “RAM” in the original question may be a mistranscription of “ARM” (two MCUs) or literally RAM sizing. Both covered above.
For a reliable link between a BK7321N Wi-Fi/BT SoC and an HK32F030MF Cortex-M0, cross-connect their UARTs at 3 V3, match 8-N-1 parameters, and keep buffers tiny because the HK32 has only 2 kB RAM. Use BK’s secondary UART (P0/P1) so the noisy boot console doesn’t collide with your protocol, implement a length-prefixed packet plus CRC, and watch supply decoupling to survive BK’s RF current spikes. This architecture is now standard in Tuya-derived IoT products and well supported by OpenBeken tooling; future designs may drop the helper MCU entirely as BK firmware matures.