Solution manual for The Design of CMOS Radio-Frequency Integrated Circuits by Thomas H. Lee

User question

solution manual to the book, "The Design of CMOS Radio-Frequency Integrated Circuits", by Thomas Lee

Artificial Intelligence Response

Direct answer to the question

• There is no publicly available official solution manual for “The Design of CMOS Radio-Frequency Integrated Circuits” by Thomas H. Lee. Any official solutions or instructor materials are restricted to verified instructors through Cambridge University Press. If you are faculty, you can request access via Cambridge’s instructor portal; students should work through their course staff. I can’t help locate or share unauthorized copies. (cambridge.org)
• If you need help with a specific exercise, tell me the chapter and problem number and I’ll walk you through a correct derivation and/or a simulation-backed check.

Key points

• Cambridge’s catalog page for this title explicitly lists “Instructor restricted resources,” confirming that ancillary materials exist but are gated. (cambridge.org)
• Verified instructors can request an examination copy and (after verification) instructor resources through Cambridge. (cambridge.org)
• For self-study, legitimate third‑party platforms like Numerade host worked video solutions for many end‑of‑chapter problems; coverage is partial and quality varies by contributor. (numerade.com)

Detailed problem analysis

Thomas Lee’s RFIC text (2nd ed.) was written as a graduate-level course book and includes about 185 end‑of‑chapter exercises. Publisher policy is to provide solutions only to verified instructors to preserve assessment integrity. This is typical for flagship EE textbooks that remain widely assigned. Practically, that means:

• If you are teaching with the book: you can obtain the instructor resources (typically including solutions and/or guidance) through Cambridge’s instructor portal after academic verification. (cambridge.org)
• If you are learning independently or enrolled as a student: you will not get the full, official solutions set from the publisher. Instead, the most effective engineering practice is to solve and then verify through analysis and simulation.

Methodology to solve common problem types in Lee’s book (what I’ll help you do, step‑by‑step):

• Passive/RLC and matching problems (Chs. 3–4, 7): derive with impedances and quality factor Q; verify with AC sweeps and Smith chart plots; check loaded vs. unloaded Q numerically.
• MOS/compact modeling (Ch. 5): carry both square‑law and velocity‑saturation forms; verify gm, ro, Cgs/Cgd vs. bias in a DC operating point and small‑signal AC analysis; sweep W/L to confirm scaling.
• High‑frequency amplifier design and bandwidth estimation (Chs. 8–9): use OCTC/ECTC estimates for poles/zeros; validate with AC sims and transient step response; compare peaking vs. group delay flatness targets.
• Bias/voltage references (Ch. 10): derive constant‑gm loop conditions and startup; verify with DC op‑point, temp sweeps, and Monte Carlo for mismatch.
• Noise and LNAs (Chs. 11–12): derive NF from source degeneration and matching; include channel‑thermal and induced gate noise; confirm with noise analysis vs. hand calculations at 50 Ω source.
• Mixers (Ch. 13): compute conversion gain and NF from commutation; evaluate IIP2/IIP3 by two‑tone large‑signal tests; confirm LO feedthrough suppression with realistic device parasitics.
• Feedback, PLLs, oscillators, phase noise (Chs. 14–18): linearize loops; compute stability margins (phase/gain); derive Leeson-like phase‑noise estimates; verify with pnoise/pss where available, or behavioral simulations.
• Architectures (Ch. 19): reconcile block specs to meet end‑to‑end sensitivity, linearity, and power budgets; verify with cascaded NF and IP3 calculations and with behavioral chain simulations.

I can provide concrete SPICE netlists, bias targets, and simulator setups (e.g., AC/noise/periodic steady‑state) for your specific exercise so you can both solve and validate rigorously.

Current information and trends

• As of February 2, 2026, Cambridge still indicates instructor‑restricted resources for this title; no public solution manual is listed for general access. (cambridge.org)
• Cambridge’s examination‑copy flow remains restricted to verified lecturers/instructors, consistent with standard textbook policy. (cambridge.org)
• Third‑party instructional platforms (e.g., Numerade) provide video solutions for many problems in several chapters. Treat these as study aids, not authoritative errata or official solutions. (numerade.com)

Supporting explanations and details

Technical verification workflow you can apply to almost any exercise:

• Start with an analytical model: small‑signal parameters, noise sources, and parasitics that dominate the regime of interest.
• Create a minimal reproducible schematic: ideal passives first to validate the core derivation, then replace with realistic components and CMOS models to expose second‑order effects.
• Use targeted analyses:
  • AC for gain/phase and pole‑zero checks; parametric sweeps for peaking factor m.
  • Noise analysis for spot NF and integrated noise; sweep source resistance to see the NF minimum.
  • Transient for startup and time‑domain settling in bias and PLL loops.
  • Two‑tone (.tstab/.pac or transient) for IP3 in LNAs/mixers and PA large‑signal behavior.
• Compare: plot simulated metrics against closed‑form expressions; reconcile deviations by identifying parasitics (e.g., Cgd‑induced input negative resistance at HF).

Ethical and legal aspects

• Distributing or soliciting unauthorized copies of a solution manual infringes copyright and undermines academic integrity; I won’t assist with that. Please use the official publisher channels or course‑authorized materials. (cambridge.org)
• When using third‑party solution videos, credit appropriately and verify independently; do not submit verbatim solutions where prohibited by course policy. (numerade.com)

Practical guidelines

• If you’re faculty: register with Cambridge Higher Education, request an examination copy, and apply for instructor resources under your institutional email. (cambridge.org)
• If you’re a student/self‑learner:
  • Use Numerade selectively for hints, then do your own derivation and simulation-based verification. (numerade.com)
  • Build a small “RF toolbox” in your simulator (e.g., Spectre, ADS, LTspice): parameterized inductors with Q, transmission line blocks, and reusable noise source macros.
  • Keep an error log: where simulation diverges from hand analysis, attribute the gap to a specific parasitic or nonlinearity—this is the fastest path to mastery.

Possible disclaimers or additional notes

• Coverage and difficulty vary by edition/printing; cross‑chapter numbering sometimes differs between early printings and e‑book versions. The Cambridge catalog is the source of truth for the current edition metadata. (cambridge.org)
• Third‑party solutions may be incomplete or occasionally incorrect; always corroborate against first principles and simulation.

Suggestions for further research

• Complementary texts with detailed worked examples: Razavi’s “RF Microelectronics” and Gray/Hurst/Lewis/Meyer for analog fundamentals.
• Explore recent tutorials in IEEE Solid‑State Circuits Magazine and RFIC/ISSCC short courses for updated design heuristics and phase‑noise/linearity techniques.
• For hands‑on depth, reproduce a chapter design (e.g., inductively‑degenerated LNA) in your process design kit or in an open PDK; document NF, IIP3, and stability margins vs. your hand calculations.

Brief summary

• Official solutions for Lee’s RFIC textbook are instructor‑only; there is no sanctioned public solution manual. Faculty can obtain resources via Cambridge; students should work through instructors and use legitimate study aids. If you share a specific problem, I’ll help you derive and verify a correct, simulation‑backed solution. (cambridge.org)

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