Corsair VS550 PSU Schematic, OEM Variants, Typical Faults, and Repair Tips

User question

Corsair VS550 PSU Schematic

Artificial Intelligence Response

Direct answer to the question

• Corsair has never published a service schematic for the VS550, and there isn’t a single “correct” diagram because the VS550 name spans multiple OEM platforms and revisions.
• If you need circuit-level information for repair, the practical route is to identify your exact revision/OEM and work from a block/topology map plus the IC datasheets and board silkscreen.

Key points

• No official schematic; designs vary (mainly CWT/HEC/Great Wall platforms across years).
• Typical ATX SMPS building blocks are consistent; you can derive 80–90% of the circuit from controller datasheets and PCB tracing.
• Start any diagnosis from 5VSB and PFC; use safe power-up practices (isolation transformer + series bulb).

Detailed problem analysis

Internal architecture you will see in every VS550 (naming may vary by revision)

• AC front end (HOT side)
  • IEC inlet → fuse (F1) → EMI/EMC filter (X/Y caps, CM choke) → NTC inrush limiter → bridge rectifier (BR1).
  • Active PFC boost stage: LPFC choke + QPFC MOSFET + DPFC diode (or MOSFET pair if totem‑pole in newer low‑cost variants is unlikely) raising bulk bus to ≈360–400 VDC.
  • Bulk capacitors: typically 1–2× 220–330 µF, 400–450 V.
• Main converter
  • Predominantly two‑transistor forward (a.k.a. double‑forward) PWM with two primary MOSFETs on the HOT heatsink, driven by a combo PFC/PWM controller or discrete PFC + PWM pair.
  • Transformer T1 with multiple secondary windings.
• Standby supply (always-on)
  • A small flyback converter around a dedicated PWM (TNY/STR/OB/ICE family) feeding +5VSB and housekeeping rails for the supervisor/PWM VCC.
• Secondary power (COLD side)
  • +12 V rail: Schottky rectifiers on earlier/group‑regulated units; synchronous rectification MOSFETs on some later spins.
  • +5 V and +3.3 V rails: either group‑regulated from the same secondary + coupled choke, or generated by DC‑DC buck daughterboards fed from +12 V on newer spins.
  • Supervisor/PG IC monitors OVP/UVP/OCP and drives PS_ON#/PWR_OK (typical families: WT75xx, PS22x, GR83xx, or similar).
  • Output LC filters; thermistor/thermostat for fan control (sometimes integrated in the supervisor or a small FAN driver IC).

Common controller/device families you are likely to find (exact P/N varies by revision)

• PFC/PWM: CM6800/CM6802/CM6500 series, or NCP1653/NCP1608 + SG6105D/UC384x‑class PWM.
• 5VSB PWM: TinySwitch (TNY277–TNY280), STR‑A6xxx, OB2269, ICE2xx.
• Supervisor: WT7527/WT7502, PS223, GR8323, Sitronix ST9S series.
• Secondary rectification: 12 V Schottkys (e.g., SBL/MBR40–60A class) or SR MOSFETs; +5 V/+3.3 V buck controllers (e.g., APW7159/APW7073/AOZ/Aps).

Block-to-board mapping (helps “read” the PSU without a schematic)

• HOT side: BR1 → big inductor LPFC near bulk caps → QPFC/DPFC on HOT heatsink → main PWM U_PFC/PWM → Q1/Q2 (two primary MOSFETs) → T1.
• STBY: small transformer T_STBY + U_STBY + a 4.7–47 µF VCC electrolytic; feeds +5VSB (purple wire) and VCC rails via an aux winding/linear drop.
• COLD side: large toroid L12/L5/L3 (group‑regulated units) or two small DC‑DC boards (buck inductors L5/L3) plus sync FETs or Schottkys on the secondary heatsink; U_SUP near the 24‑pin harness.

Measurement sequence and expected values (bench, no motherboard)

• Safety first: isolation transformer + 60–100 W series bulb limiter on first power‑ups.
• With AC applied, PS_ON# open (not shorted to GND):
  • +5VSB (purple, ATX pin 9): 5.0 V ±5%.
  • Supervisor VCC: ~5 V from 5VSB (if linear-fed) or ~12–14 V from aux winding once main starts.
• Trigger main rails by shorting PS_ON# (green, ATX pin 16) to any GND (black):
  • Bulk bus after PFC: ≈360–400 VDC steady (230 V mains) or ≈380–400 V on 120 V if PFC is active; without PFC you’ll see ≈150–170 V on 120 V.
  • +12 V: 12.0 V ±5% at light load.
  • +5 V and +3.3 V: within ±5%; note that group‑regulated units may drift if rails are unloaded—use dummy loads.

Typical failure patterns and where to look

• 5VSB hiccup/no start: dried 4.7–10 µF VCC electrolytic around the standby IC; replace with low‑ESR 105 °C part.
• Blown fuse/instant lamp full‑bright: shorted primary MOSFET(s) or bridge; check Q1/Q2 and BR1 first.
• No PFC (low bulk voltage, e.g., ~150 V on 120 V mains with PS_ON asserted): open startup resistors feeding PFC IC VCC, failed QPFC/DPFC, or bad PFC current sense resistor.
• Starts then shuts down (PG low): secondary short (12 V rectifier/SR FET), or supervisor seeing UVP due to bad output caps (Teapo/CapXon class parts commonly age out).
• Excess ripple/unstable rails: aged secondary electrolytics; replace with high‑ripple low‑ESR series (≥2–3× ripple rating vs. original).
• Fan twitch only: OCP from shorted secondary device; isolate rails and test rectifiers/FETs out of circuit.

How to proceed without a schematic

• Identify revision: read PCB silkscreen (e.g., “CWT GPA/GPB/GPM…”, HEC code) and IC markings. That tells you whether you have group‑regulated vs. DC‑DC.
• Pull the controller datasheets: the “typical application” diagrams mirror the on‑board implementation closely (pinouts, biasing, sense networks).
• Trace only the critical loops: PFC (AC→bulk), PWM drive (controller → gate transformer/driver → Q1/Q2), 12 V secondary path, and the buck boards if present.
• Document with photos: mark HOT/COLD boundaries, then annotate test points and measured values; this becomes your working schematic.

Current information and trends

• As of February 5, 2026, Corsair’s VS series remains an entry‑level, 80 PLUS White line with multiple OEM revisions under the same retail name. Some later spins improve efficiency/noise via minor BOM changes, and certain low‑power models in the market have migrated to +5 V/+3.3 V DC‑DC rails; others remain group‑regulated for cost.
• Public, component‑level service schematics for consumer ATX PSUs are still generally not released by major brands; repair knowledge is community‑driven and IC‑datasheet‑based.

Supporting explanations and details

Typical threshold ranges (supervisor IC families; consult your exact IC)

• +12 V OVP ≈ 13.0–13.7 V; UVP ≈ 10.0–10.8 V.
• +5 V OVP ≈ 5.6–6.2 V; UVP ≈ 4.2–4.6 V.
• +3.3 V OVP ≈ 3.7–4.1 V; UVP ≈ 2.8–3.1 V. Design notes for reliable repairs
• Replace secondary electrolytics as a set if ESR is high; match ripple current and temperature rating (105 °C) and keep lead length short.
• Primary MOSFET substitutes: same or lower RDS(on), equal/higher VDS (≥600 V), equal/higher SOA.
• Rectifier upgrades: keep package/heatsinking similar; check surge current and thermal resistance.
• Reapply silicone/wedges around tall/heavy parts after service to prevent vibration cracks.

Ethical and legal aspects

• Internal schematics are proprietary to Corsair and their OEMs; distributing any leaked documentation may infringe IP.
• Safety: the primary side operates at lethal voltages; use isolation, discharge procedures, and appropriate PPE. Do not work live without training.
• Environmental: if repair is uneconomical or insulation is compromised, responsible recycling is preferable to unsafe reuse.

Practical guidelines

Implementation method (safe bring‑up)

• Series bulb limiter (60–100 W) on first power; verify 5VSB steady.
• Assert PS_ON with a 1 kΩ to GND; attach dummy loads: e.g., 10–22 Ω/10–25 W on +5 V, 5–10 Ω/10–50 W on +12 V to stabilize group‑regulated units.
• Verify PWR_OK goes high (~5 V) within 100–500 ms after rails stabilize. Best practices
• Work COLD side first when possible; only move to HOT side after excluding secondary shorts.
• Lift one leg for in‑circuit suspect semis; measure D‑S resistance and diode drops with a reliable meter.
• Log all measurements; intermittent faults often show as drift in VCC or ripple. Potential challenges and mitigation
• Multiple revisions: photograph and label; keep your own map.
• Hidden faults under silicone: soften with gentle heat and remove carefully to avoid pad lift.
• Marginal caps passing ESR but failing under ripple: scope ripple at full load if you can.

Possible disclaimers or additional notes

• Without the exact PCB revision/IC list, part numbers above are indicative, not definitive.
• Some VS550 lots use different fan control or supervisor ICs that change PG timing; expect small behavioral differences.

Suggestions for further research

• Provide clear photos of both PCB sides and the markings of the PFC/PWM, standby IC, and supervisor IC; I can derive a targeted partial schematic and test plan for your exact unit.
• Pull the datasheets for your detected controllers (PFC/PWM, standby, supervisor) and match resistor networks to the “typical application” circuits.
• Consult reputable PSU repair communities and SMPS application notes on double‑forward converters and APFC troubleshooting for deeper theory.

Brief summary

• There is no official Corsair VS550 schematic due to multiple OEM revisions. Nevertheless, the VS550 follows standard ATX SMPS blocks: EMI/bridge → APFC → double‑forward → transformer → secondary rectification/regulation (+12 V, plus group‑regulated or DC‑DC 5 V/3.3 V) with a 5VSB flyback and a supervisor IC.
• Identify your revision, read IC markings, and combine datasheets with measured test points to create a working, repair‑grade “pseudo‑schematic.” If you can share photos/IC lists or symptoms, I’ll outline a component‑level diagnostic for your exact unit.

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