PCB Trace Width for Current | IPC-2221 Copper Thickness, External vs Internal

User question

What PCB trace width do I need for my current?

Artificial Intelligence Response

Direct answer to the question

You cannot determine PCB trace width from current alone. At minimum, you also need:

• Copper thickness: typically 1 oz or 2 oz
• Trace location: external or internal
• Allowable temperature rise above ambient, e.g. 10°C or 20°C
• Ideally also trace length and acceptable voltage drop

For a quick starting point, if you assume 1 oz copper and use the classic IPC-2221 current formula, then for an external trace:

Current	Width @ 10°C rise	Width @ 20°C rise
1 A	11.8 mil / 0.30 mm	7.8 mil / 0.20 mm
2 A	30.8 mil / 0.78 mm	20.2 mil / 0.51 mm
5 A	108.9 mil / 2.77 mm	71.5 mil / 1.82 mm
10 A	283.2 mil / 7.19 mm	186.0 mil / 4.72 mm

For an internal trace, the same assumptions give much larger widths at 10°C rise:

Current	Internal width
1 A	30.8 mil / 0.78 mm
2 A	80.0 mil / 2.03 mm
5 A	283.2 mil / 7.19 mm
10 A	736.8 mil / 18.7 mm

These numbers come from the IPC-2221 formula used by tools such as KiCad’s PCB calculator, with \(K=0.048\) for external traces and \(K=0.024\) for internal traces. (docs.kicad.org)

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Detailed problem analysis

The engineering issue is not “how much current fits in a width,” but rather:

1. Copper trace resistance
2. I²R heating
3. How efficiently the board can remove that heat

That is why trace width depends on thermal conditions, not only on amperes.

The common quick-estimate formula used in IPC-2221-based calculators is:

\[ I = K \cdot \Delta T^{0.44} \cdot (W \cdot H)^{0.725} \]

where:

• \(I\) = current
• \(\Delta T\) = allowed temperature rise
• \(W\) = trace width
• \(H\) = copper thickness
• \(K = 0.048\) for external traces
• \(K = 0.024\) for internal traces

So, solving for width:

\[ W = \frac{\left(\frac{I}{K\Delta T^{0.44}}\right)^{1/0.725}}{H} \]

This is why internal traces need to be much wider: they cannot cool by free convection into air as well as external traces can. (docs.kicad.org)

In practice, current capacity is also affected by additional physical factors. IPC-2152 was created specifically for current-carrying capacity in printed board design, and its scope includes conductor sizing charts, conductor temperature rise, parallel conductors, vias, copper weight, board material, board thickness, and copper planes. (ipc.org)

From an engineering standpoint, these are the main effects:

• Higher current → wider trace required
• Thicker copper → narrower trace can carry the same current
• Internal layer → significantly wider than external
• Higher allowed temperature rise → narrower trace permitted
• Nearby copper planes → often lower actual temperature rise
• Closely spaced parallel hot traces → worsen heating versus an isolated trace
• Long traces → voltage drop may become the real limit, even before temperature does (ipc.org)

A very important practical point: for power rails, voltage drop often matters as much as ampacity. A trace may survive thermally but still be electrically poor if the IR drop is too high. This is especially true for low-voltage rails such as 1.0 V, 1.2 V, 3.3 V, or high-current LED and motor supplies.

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Current information and trends

Current IPC references show that:

• IPC-2152 is the dedicated standard for current-carrying capacity in PCB design. (ipc.org)
• IPC’s current document revision table marks IPC-2152 as “No Longer Maintained”. (ipc.org)
• The same IPC revision table shows IPC-2221 Rev C dated December 2023. (ipc.org)

The practical implication is:

• Engineers still commonly use IPC-2152-style thinking because it better reflects real thermal behavior than old one-line rules.
• For quick estimates, many CAD tools still expose the simpler IPC-2221 formula.
• For serious power design, the modern best practice is:
  1. do an initial IPC-style calculation,
  2. add design margin,
  3. check voltage drop,
  4. validate by thermal measurement on hardware.

That mixed approach is more realistic than relying on a single lookup table. (docs.kicad.org)

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Supporting explanations and details

A useful way to think about this is:

• A narrow trace is like a thin wire: higher resistance, higher heat.
• A wide trace or copper pour is like a bus bar: lower resistance, better spreading of heat.

For higher current designs, these approaches are often better than simply making one routed track wider:

• Copper pour / polygon instead of a simple trace
• 2 oz or heavier copper
• Top and bottom traces in parallel
• Via arrays when changing layers
• Shorter current paths
• Dedicated power planes

IPC-2152 also explicitly discusses vias and parallel conductors, which matters because a trace may be wide enough, yet the transition through one via may become the bottleneck. (ipc.org)

If your trace is part of a switching power stage, motor driver, or battery path, I would also check:

• steady-state current
• peak current
• pulse duration and duty cycle
• copper temperature near connectors and vias
• connector/contact rating, not just trace width

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Ethical and legal aspects

For ordinary low-voltage electronics, the issue is mainly reliability and safety margin.

For mains, battery packs, automotive, medical, or other safety-related products:

• do not rely on a rule-of-thumb table alone
• verify temperature rise experimentally
• check creepage/clearance separately from width
• confirm compliance with the applicable product safety standard and PCB fabrication class

A trace that is thermally acceptable may still be noncompliant electrically or unsafe in fault conditions.

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Practical guidelines

Use this workflow:

1. Define the real current

   • DC: use maximum continuous current
   • AC: use RMS current
   • Pulsed load: use RMS for heating, but also verify peak current and fault cases

2. Choose assumptions

   • copper weight: 1 oz or 2 oz
   • external vs internal
   • allowed rise: 10°C is conservative, 20°C is common

3. Calculate initial width

   • use IPC-2221 formula or a trusted calculator

4. Then check voltage drop

   • especially if the trace is long or the rail voltage is low

5. Add margin

   • typically 20% to 50% extra width if board area allows

6. For high current

   • prefer pours, planes, multiple layers, and via stitching

7. Validate on hardware

   • thermocouple, RTD, or IR camera under worst-case load

A practical rule for design reviews: if you are above roughly 5–10 A, stop thinking only in terms of “trace width” and start thinking in terms of power distribution geometry.

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Possible disclaimers or additional notes

• The IPC-2221 formula is a simplified estimate, not a full thermal model. (docs.kicad.org)
• Real results depend strongly on:
  • adjacent copper
  • airflow
  • board thickness
  • proximity to planes
  • spacing from other hot traces (ipc.org)
• KiCad’s published IPC-2221 implementation notes validity limits of about 35 A external, 17.5 A internal, 100°C rise, and 400 mil width for that calculator model. (docs.kicad.org)

So for extreme currents, unusual stackups, or dense power layouts, use simulation and measurement rather than trusting a simple equation.

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Suggestions for further research

If you want to refine the answer for your exact design, the next useful parameters are:

• current
• copper weight
• external or internal layer
• allowed temperature rise
• trace length
• acceptable voltage drop
• ambient temperature
• whether there is a nearby plane or copper pour

With those, you can compute:

• minimum safe width
• actual resistance
• power loss
• voltage drop
• estimated thermal margin

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Brief summary

The short answer is:

• You need more than current alone to size a PCB trace properly.
• A good first estimate comes from IPC-2221.
• A more realistic engineering view comes from IPC-2152-style thermal considerations. (ipc.org)

If you want, send me these four values:

• current
• copper thickness
• external or internal
• allowed temperature rise

and I will calculate the exact trace width for your case, plus voltage drop and a recommended design margin.

Disclaimer: The responses provided by artificial intelligence (language model) may be inaccurate and misleading. Elektroda is not responsible for the accuracy, reliability, or completeness of the presented information. All responses should be verified by the user.