TP.SIS231.PT85 Vivax TV-40LE60 Test Points and Power Rail Fault Check

User question

show me the test points on that board

Artificial Intelligence Response

Direct answer to the question

If you mean the TP.SIS231.PT85 board used in the Vivax TV-40LE60, I cannot literally highlight the pads on a photo unless you upload the board image, but the public service documentation does show the main diagnostic nodes. Importantly, I did not find a separate public “TP1 / TP2 / TP3 test-point location map”; instead, the schematic marks several nets simply as TEST around the power-conversion section. (electronica-pt.com)

The most useful test points/nodes on this board are:

• 5V TEST
• 3V3_STB TEST
• 3V3_M TEST
• 1V5_DDR TEST
• 1V0_M TEST
• BL_ON TEST
• ADJ/PWM TEST
• SPI flash U5 pins
• LED output connectors CNB813 / CNB803 / CNB805
• 12V / GND connector pins where available (electronica-pt.com)

Detailed problem analysis

The public TP.SIS231.PT85 manual describes this board as an integrated power supply, LED driver, and TV main board, and the same manual includes main board circuit diagrams and a main board service manual section. That means the practical “test points” are mostly the regulator outputs, control lines, flash pins, and LED outputs rather than a dedicated factory TP list. (electronica-pt.com)

For troubleshooting, this is the effective test-point map:

1. 5V TEST

   • Shown in the schematic near UD1 and LD1.
   • This is one of the first rails to verify. (electronica-pt.com)

2. 3V3_STB TEST

   • Generated by UL1 (LC1117CLTR33) from 5V_STB to 3V3_STB.
   • This is a critical standby rail. (electronica-pt.com)

3. 3V3_M TEST

   • Generated by UL11 (LC1117CLTR33) from 5V_M to 3V3_M.
   • This is a main logic rail. (electronica-pt.com)

4. 1V5_DDR TEST

   • Generated by UL61 and labeled 1V5_DDR.
   • This rail feeds DDR memory-related logic. (electronica-pt.com)

5. 1V0_M TEST

   • Shown near UD41 (RT7237CHGSP) and labeled 1V0_M TEST.
   • This is the SoC core rail and is one of the most important boot rails. (electronica-pt.com)

6. BL_ON TEST

   • This is the backlight enable control node.
   • If the TV boots but backlight does not start, this point is essential. (electronica-pt.com)

7. ADJ/PWM TEST

   • This is the backlight dimming / PWM control node, tied to BL_PWM / ADJ/PWM in the schematic.
   • Useful when the backlight turns on but brightness control is abnormal. (electronica-pt.com)

8. SPI flash U5

   • The schematic identifies U5 as GD25Q64BSIG.
   • Pinout shown in the manual:
     • Pin 1: SPI_CS0_N
     • Pin 2: SPI_DO
     • Pin 5: FLASH_SPI_DI
     • Pin 6: SPI_CLK
     • Pin 8: VCC = 3V3_STB (electronica-pt.com)

9. LED output section

   • The LED driver/output area exposes nodes at:
     • CNB813
     • CNB803
     • CNB805
   • These are labeled with LED+ and LED-FB in the schematic. (electronica-pt.com)

10. 12V / GND access points

    • The interface definition pages show connector pins carrying +12V and GND, which are convenient measurement points when checking whether the secondary supply is alive. (electronica-pt.com)

Current information and trends

What is publicly available for this chassis is still mainly the generic TP.SIS231.PT85 service/specification manual, not a Vivax-specific annotated board photo with all test pads called out. In practice, repair technicians therefore use the schematic TEST nodes and nearby regulator outputs as the working test points. (electronica-pt.com)

Supporting explanations and details

A practical way to think about this board is:

• Start with power rails

  • 5V
  • 3V3_STB
  • 3V3_M
  • 1V5_DDR
  • 1V0_M (electronica-pt.com)

• Then check boot storage

  • U5 flash supply on pin 8
  • SPI activity on pins 1, 2, 5, 6 if you have an oscilloscope (electronica-pt.com)

• Then check display/backlight control

  • BL_ON
  • ADJ/PWM
  • LED+ / LED-FB at the LED connectors (electronica-pt.com)

By net naming, the expected DC values are approximately:

• 5V at 5V TEST
• 3.3V at 3V3_STB and 3V3_M
• 1.5V at 1V5_DDR
• 1.0V at 1V0_M
  This is an inference from the schematic rail names and regulator labels, but it is the standard interpretation for these nets. (electronica-pt.com)

Ethical and legal aspects

The main concern here is electrical safety, not ethics. Because TP.SIS231.PT85 is an integrated power-supply/main board, hazardous mains-derived circuitry is present on the same PCB, and the manual also includes general precautions about avoiding conductive contact and not connecting power improperly. (electronica-pt.com)

Practical guidelines

If you want the shortest usable probe list, check these in order:

• 5V TEST
• 3V3_STB TEST
• 1V0_M TEST
• 1V5_DDR TEST
• 3V3_M TEST
• U5 pin 8
• BL_ON TEST
• ADJ/PWM TEST
• LED+ / LED-FB connectors (electronica-pt.com)

Best practice:

• Use the secondary-side ground for logic measurements.
• Do not probe the primary side casually.
• If the set is dead: start with 5V / 3V3_STB.
• If stuck in standby or logo: check 1V0_M, 1V5_DDR, and U5 flash.
• If sound but no picture: check BL_ON, ADJ/PWM, and LED outputs.

Possible disclaimers or additional notes

I need to be precise: I can identify the electrical test nodes from the service documentation, but I cannot show their exact physical pad positions on your specific board revision unless you send a clear top-side photo. The public documents do not expose a neat TP-number map. (electronica-pt.com)

Suggestions for further research

If you upload:

• a full top-side photo
• a close-up around the SoC/regulators
• a close-up around U5 flash
• a close-up of the LED connector area

I can mark the exact likely pads for:

• 5V
• 3.3V standby
• 1.0V core
• 1.5V DDR
• BL_ON
• PWM
• SPI pins on U5

Brief summary

For the TP.SIS231.PT85, the useful test points are the schematic nodes labeled TEST rather than a public TP1/TP2 map. The key ones are 5V, 3V3_STB, 3V3_M, 1V5_DDR, 1V0_M, BL_ON, ADJ/PWM, plus U5 SPI flash pins and the LED+ / LED-FB connectors. (electronica-pt.com)

If you want, send me a photo of the board, and I will mark the test points for you one by one in plain language, for example: “measure here, here, and here.”

Disclaimer: The responses provided by artificial intelligence (language model) may be inaccurate and misleading. Elektroda is not responsible for the accuracy, reliability, or completeness of the presented information. All responses should be verified by the user.