Break vector definition and usage in microprocessor interrupt handling systems

What is a break vector?

Maybe please clarify your question?

I corrected it, it was about the INTERRUPT VECTOR. Is it just an interrupt name - e.g. RESET, INT0 ...?

Most often, this term denotes the address of the interrupt handler, which is contained in an array somewhere in memory.

The processor interrupts work in AVR processors on the basis that (excluding other operations) after a given interrupt ( when operated by the processor ) the command is saved the next one that would have been executed if the processor had not accepted the interrupt (its address in flash) and jump to one of the addresses from the very beginning of the flash. This given address is called the interrupt vector, i.e. the address at which the instruction counter jumps when the interrupt occurs. In place of this vector, enter a jump instruction to the point where the interrupt is handled.
The case is best seen at ASM. This program only supports one interrupt (TIM0_COMPA).
If you have questions, I will explain the details of this code and issues
{ remarks written in italics from a colleague of BlueDarco }
[syntax=asm]
/*
* Created: 2012-07-12 10:32:21
* Author: Piotr
*/
;dołączenie definicji procesora
.include "tn10def.inc"
;nazwa dla rejestru tymczasowego (x2)
.def temp = R17
.def temp2 = R18
;nazwa dla zmiennej licznika
.def ct = R19
;tablica przerwań (wektorów przerwań) jest umieszczona na samym początku pamięci flash (rozkazów). Zawsze pod adresem 0x0000 znajduje się wektor RESET który jest wywoływany przy starcie programu. Kolejne początkowe adresy (zgodnie z modelem procesora) zajmowane są przez wektory innych przerwań.
.org 0x0000
rjmp RESET ;RESET
reti ;INT0
reti ;PCINT0
reti ;TIM0_CAPT
reti ;TIM0_OVF
rjmp TIM0 ;TIM0_COMPA
reti ;TIM0_COMPB
reti ;ANA_COMP
reti ;WDT
reti ;VLM
reti ;ADC
;po resecie procesora
RESET:
ldi temp,low(RAMEND)
out SPL,temp
ldi temp,high(RAMEND)
out SPH,temp
;ustawiamy PB2 jako wyjście
SBI DDRB,PB2
;timer w tryb CTC, preskaler 1
ldi temp,(1

Not "upon occurrence", but "upon receipt", but rather "in operation" (by the processor, not to be confused with programmatic operation).
Not "currently executing", but "the next one that would have been executed if the processor had not accepted the interrupt".
These are two quite significant differences.

And not necessarily "from the very beginning of Flash".

Or, otherwise, an interrupt is the occurrence of a specific event. The interrupt vector is a place (physical address in the program memory to which the microcontroller goes after a specific event occurs) generalizing the vector table usually contains only jumps to the interrupt handlers.

So more vividly you sit in front of the computer and click on the post, at some point you need to go to the toilet (this is an interruption) its vector is the toilet but there it turns out that there is a voltage failure on the door in the second building so you rush to another building (this is the address of the interrupt jump) and the handler will guess for yourself. I hope nobody will ride for it, although it's a slight offtop

As for the first two remarks - I agree, I added specific quotes in the appropriate places.
As for the last one, yes, I have already explained that it is usually the beginning of the flash memory, but in specific cases (specifically when setting the IVSEL bit in the MCUCR register in processors where this bit is available) it moves the beginning of this table to the address where it begins Bootloader. And as you can guess, this setting is used primarily when writing Bootloader. Then the reset vector is set to the address where we start the bootloader.