I need to design (an exercise) a two-stage CMOS op-amp using the following specs:
1) Dual power supply +(-) 3V
2) A(0) = 10^3
3) Gain–bandwidth product 100 kHz
4) Rin > 100M and Rout < 10k
I have already seen on several book (like Razavi, Allen, Gray, Sedra-Smith, etc..) but all of them start from other specs, like SR and similar... so I have no idea how to start, find currents, Vt, size of each MOS.
Can someone please help me? I need first/second step.
Thanks a lot!
1) Dual power supply +(-) 3V
2) A(0) = 10^3
3) Gain–bandwidth product 100 kHz
4) Rin > 100M and Rout < 10k
I have already seen on several book (like Razavi, Allen, Gray, Sedra-Smith, etc..) but all of them start from other specs, like SR and similar... so I have no idea how to start, find currents, Vt, size of each MOS.
Can someone please help me? I need first/second step.
Thanks a lot!