10-bit PISO Shift Register

Hey,

Just wondering if anyone knew of any Veriloga code of a 10-bit parallel in serial out (PISO) shift register. I am very new to coding in Veriloga, so any examples or help is appreciated.

Thanks!

What type of shift registers You need?
Direct shifted or double buffered outputs registers?

See examples.

I believe it is just a direct shift. I have a 10 bit parallel number, and I want to implement it through a PISO 10-bit shift register.

Example of Universal Shift Register [4].
Change the N to 10 (10-bits).

is it possible that you know of a parallel input, serial output shift register?

Do not quite understand the question.
You are confused existence of a shift register with parallel load serial input?
This can be used to cascade (if needed).
In place of the 1st bit of the shifted bit is written from the serial input.
Also, if the input is connected to the GND, then place on the shifted bit is value "0".
Also, if the input is connected to the Vcc, then place on the shifted bit is value "1".

Examples of highly specialized 8-bits shift registers:

Verilog code for an 8-bit shift-left register with a positive-edge clock, serial in and serial out.
module shift (clk, si, so);
input clk,si;
output so;
reg [7:0] tmp;
always @(posedge clk)
begin
tmp

See the included file (easy to modify to the 10-bits).