DISPLAY CONTROLLER
A data processor has a 6-line bus configured as 4 lines for data, 1 for the clock and 1 for status. The status line outputs a pulse each time the data on the bus changes, the 4-bit data representing 1 digit. The data processor is supposed to feed a 4-digit display consisting of 4, 4-bit input buffer registers and 4, 7-segment displays, one for each digit. Starting with the block diagram of the system, design a controller so that each of the 4 digits goes to its respective register
A data processor has a 6-line bus configured as 4 lines for data, 1 for the clock and 1 for status. The status line outputs a pulse each time the data on the bus changes, the 4-bit data representing 1 digit. The data processor is supposed to feed a 4-digit display consisting of 4, 4-bit input buffer registers and 4, 7-segment displays, one for each digit. Starting with the block diagram of the system, design a controller so that each of the 4 digits goes to its respective register
