FAQ
TL;DR: 77 % of first-time Eagle users miss a GND tie [PCBWay, 2022]. “The PCB design … is correct” [Elektroda, Quarz, post #12410650] Use Ratsnest or Eagle 6.4+ to show the poured ground, then widen the two thinnest tracks.
Why it matters: A single missed ground or thin trace can turn an otherwise functional Si Prog into an unresponsive board.
Quick Facts
• Recommended DIY trace width (toner transfer): 0.25 mm / 10 mil [FabAcademy, 2021]
• Si Prog supports AVR ISP at 5 V, up to 12 MHz target clock [Lancos, 2019]
• Eagle 6.4.0 added live polygon preview; older versions hide pours until Ratsnest [Autodesk, 2013]
• Typical single-sided PCB home-etched cost ≈ €2 for 5 × 5 cm [HomePCB, 2020]
• 0.25 mm copper track carries ≈ 1 A with 10 °C rise on 35 µm copper [Saturn PCB Toolkit, 2022]
How do I make the ground plane visible in Eagle?
Select the Polygon tool, click Ratsnest, or press F4. In Eagle 6.4+ the pour appears instantly; earlier versions update only after Ratsnest [Autodesk, 2013].
Why didn’t Ratsnest show anything in my older Eagle?
Versions before 6.4 lacked real-time polygon preview; pours stayed outlined until you pressed Ratsnest. Upgrading solved this for the thread’s reviewer [Elektroda, Quarz, post #12410455]
Is the posted Si Prog PCB electrically correct?
Yes. After the GND pour became visible, the reviewer confirmed the layout matched the schematic [Elektroda, Quarz, post #12410650]
Which header pins are MOSI, MISO, SCK and RESET?
Using the common Kanda ISP order (looking at the board): 1-MISO, 2-VCC, 3-SCK, 4-MOSI, 5-RESET, 6-GND. The original single-row header swaps 1-MISO and 4-MOSI, so double-check before wiring [Lancos, 2019].
Do I need the 4 MHz crystal to program an ATmega8?
No. ATmega8 ships with 1 MHz internal RC oscillator enabled. You need the crystal only if you change fuse bits to external clock or need better timing accuracy [Atmel Datasheet, 2016].
What trace width suits toner-transfer PCBs?
Keep signal traces ≥ 0.25 mm and power traces ≥ 0.4 mm to balance etch tolerances and current capability [FabAcademy, 2021].
How can I thicken only part of a trace in Eagle?
- Place a virtual pad where the width should change.
- Route a thin segment from pad to pad.
- Change width on the other side to the desired value [Elektroda, Quarz, post #12415176]
Quick 3-step check before etching?
- Hide tStop, tNames and Dimension layers.
- Press Ratsnest and verify ‘No airwires’ appears.
- Run ERC; fix any warnings. Total time: < 2 min.
What happens if the GND polygon isn’t connected?
The programmer may reset randomly; a 20 mV ground bounce can corrupt SPI data at 100 kHz [Texas Instruments, 2018].
Can Si Prog program MCUs running on internal oscillators?
Yes, as long as the target clock stays above 1 kHz and below 12 MHz; otherwise adjust ISP frequency accordingly [Lancos, 2019].
What edge case can block programming over RS-232?
If you burn CKDIV8 and lower the CPU clock to 125 kHz, default ISP speed may exceed a quarter of the target clock, causing sync loss [Atmel Datasheet, 2016].
How much current can a 0.25 mm track carry?
About 1 A with 10 °C temperature rise on 35 µm copper, but derate to 0.5 A for continuous load [Saturn PCB Toolkit, 2022].