Home page
/
Forum
/
Circuit Design
/
EEWeb Topics
/
Meaning of W/L Ratio and Process Technology (nm, um) in CMOS IC Design

Meaning of W/L Ratio and Process Technology (nm, um) in CMOS IC Design

60 2

ADVERTISEMENT

Report a violation of the law

Reply | New topic

#1 21660303 11 Dec 2011 10:31

Praveen Kumar Avala Praveen Kumar Avala

Anonymous

Post #1
21660303 11 Dec 2011 10:31

Hi,
I am new to cmos ic design. when i was going through the book, i found two terms repeatedly...1) W/L ratio and 2) process technology (in nm , um).

what does they indicate and are their any pre-defined values for them or we can give any value?

please help...
thank u

ADVERTISEMENT
#2 21660304 13 Dec 2011 11:46

Cody Miller Cody Miller

Anonymous

Post #2
21660304 13 Dec 2011 11:46

W/L is the ratio of the gate width to the gate length of a CMOS transistor. The CMOS process technology node defines the smallest structure size that can be created.
#3 21660305 15 Dec 2011 13:05

Praveen Kumar Avala Praveen Kumar Avala

Anonymous

Post #3
21660305 15 Dec 2011 13:05

thank u , miller.
Create an account, log in here. You will receive points by participating in discussions.
Join this discussion.

Install Elektroda application

Didn't find an answer? Ask Artificial Intelligence

*I agree to send the question to OpenAI, Anthropic PBC, Perplexity AI, Inc., Kagi Inc., Google LLC - owners of language models in order to prepare the best response. The companies may monitor and log information entered into the form.

*I agree to publicly display my question and answer. The question and answer will be publicly available to everyone. The process may take a few minutes. Upon completion, you will be redirected to the page with the answer.

Wait...(2min)

Reply | New topic

Report a violation of the law

Home page
/
Forum
/
Circuit Design
/
EEWeb Topics
/
Meaning of W/L Ratio and Process Technology (nm, um) in CMOS IC Design

ADVERTISEMENT