Why is my flyback converter primary current sinusoidal instead of triangular or square?

Hi Everybody, I implemented a flyback converter, but while I am expecting a triangle shape current at primary side (in DCM) and a square wave current shape in CCM I measured sth like sinusoidal. I couldn't get rid of it for one week. I need your suggestions and comments. Thanks .
I explained the problem in details here:

Flayback_Primary_Current_Problem

Graph 2 shows the converter in continuous conduction mode with ringing that is not unusual.

I suspect the transformer has more leakage inductance than the 0.28 uH shown in the model. And your SPICE model does not include the transformer turn-to-turn and primary-to-secondary capacitance. In a practical switcher the waveforms are never as clean as a simplified SPICE model shows.

The 3 MHz ringing may be due to the transformer self resonance. You can disconnect the transformer from the circuit and measure leakage inductance, primary inductance, primary-to-secondary capacitance, and the self resonant frequency. Then incorporate these additional "components" into your SPICE model and I think it will show waveforms more like what you are measuring in the lab.

Mr. Cuthbert I think you are right there must be sth related to transformer capacitance it is suspicious! But When go home I can also give this value. To sum up what can I do for this capacitance and about its affects. Any snubber or sth like that ? Thank you

My LTSPICE model shows that the ringing is due to the transformer leakage inductance and the output diode capacitance.

An RC snubber across the diode reduces the ringing at the expense of dissipating power in the snubber diode. 100 pF and 1k look like good values to begin experimenting with.

The real "fix" is to reduce the leakage inductance. This can be done by interleaving primary-secondary-primary-secondary. The cost is increased capacitive coupling between pri-sec unless shields are used. And if shields are used, that cost goes up.

A performance issue with the ringing is if an inner current loop is used at low power; the current trip point will occur during the ringing. If only voltage feedback is used the ringing may not be a big issue.

Here's a SPICE simulation of your switching power supply.

By manipulating the transformer leakage inductance and the output diode capacitance (add a shunt capacitance of 300 pF, for example), and the transformer loss resistance you can tune the model to match your measured results.

Make the leakage inductance zero and the ringing goes away but the initial spike due to charging the diode capacitance does not go away.

Here is the primary current after the 2 uF output capacitor has charged. Using the actual 200 uF output capacitor does not change the current waveform but it makes the simulation take a long time to run.

Your leakage inductance of 1% of the primary inductance is normal for a simple flyback transformer. Interleaving the primary and secondary will markedly reduce this. The advantages are better operation at low power (less ringing), the primary snubber can often be eliminated, and the power lost in the output diode RC snubber is reduced.

Here is the primary current waveform with a 100 pF - 1k ohm RC snubber across the output diode.

Here are waveforms with a proper HV diode. The FET source current waveforms here are without the diode snubber and with the snubber (33 pF + 4.7k ohm).

Output diode snubbers are commonly used on switchers including flybacks.

Emre Celik,

here is how to calculate the diode RC snubber component values.

During the switch ON period the output diode is reverse biased and is connected in series, through the coupled-inductor, to the leakage inductance and the switch. Let's effectively move the leakage inductance to the secondary side. To do this multiply the leakage inductance by the square of the coupled-inductor turns ratio. In this case the answer is 0.3uH x 144 = 43uH. Refer to the diode datasheet and it may have a graph of capacitance vs reverse bias. Let's say that is 10 pF at 100 volts, so we'll use that value. The damping resistor should be equal to the square root of L/C = [(43uH)/(10pF)]^0.5 = 2k ohms. A DC blocking capacitor is placed in series and it should be about 5X the diode capacitance. So, a 2k ohm resistor in series with a 47pF capacitor is placed across the diode. These values can be optimized in the lab.

The next step is to add the transformer stray capacitances and deal with them, if you want something close to perfection. For now you might calculate snubber values, install them, and see what the FET current waveform looks like.

I wrote a long and well organised response but it is disappeared Anyway; I will write it down again briefly
Firstly thanks for your responses Mr.Cuthbert.
I set up some snubbers(based on your explonations)(330pF-1k / 100pF-68pF- 2.7k and some other about these values) and shapes comes out like your simulation results but expense of additional power consumption (as you said before) however much more than I expected( effcy drop) each time resistors heats up too much.I will go on trying new ones to find optimal values but while my main concern is efficiency beside snubber is there any other things that I can try? I want to change my diode. (my diode right now: http://www.docdroid.net/a13l/diode-bataki.pdf.html) . Which points should I care when selecting diode? , a less capacitance? As you explained there is a resonant circuit leakage ind. + diode capc. , in this case reducing the capacitance will cause a ringing with a high frequency as far as I know. And how will the circuit be effected? in efficiency mean. Some people told me my transformer TTR(1:12) is high but due to some reasons I have to use same transformer. I this case it seems there is nothing to do related to leakage ind. so rather than leakage ind what points I can improve? You mentioned about stray capacitance I don't have any knowledge about it any suggestion or document will be appreciated. By the way I decreased switching freq from 150Khz to 100Khz and efficecncy improved %5-6 (I am not sure but maybe due to mos. drivers). Next days I will set up interleaved topology(till now I have work with single phase) and I will share what will happen. Morever I will add active clamp but according to my knowledge it won't improve the current shape(not overall efficiency). Here is a document that I prepared before to explain the same situation it may clarify some points more (http://www.docdroid.net/a2tx/flayback-primary-current-problem2-.pdf.html)
Thanks again. Good nights

The energy dissipated in the snubber is equal to V squared X snubber capacitance X frequency. V is the voltage that the snubber capacitor charges/discharges. So, the minimum snubber capacitance should be used. The snubber resistance does not affect the dissipation much and is selected along with the capacitance to reduce the switch current ringing to an acceptable level. It is all a compromise to get enough ringing reduction without dissipating too much power in the snubber. A perfect current waveform might look nice but might not be necessary.

A flyback is not a particularly efficient converter. It is popular for "universal" input power supplies that operate from 100 to 250 VAC and is usually used below 50 watts. An efficiency of 80% might be considered good. Some of the drawbacks include a large transformer, poor FET utilization and high RMS current. Some advantages are good cross regulation with multiple outputs, and no output inductor is needed.

For a PV converter at the 250 watt level a flyback is not the most efficient topology. But being that you already have a working flyback you can make it more efficient. I assume this is not going into mass production. If it were I would abandon the flyback and go with another topology.

A smaller silicon carbide Schottkey such as the GeneSiC GB02SLT12-220 has half the junction capacitance and will cut the snubber loss in half. The calculated snubber values are 2k ohms and 47 pF.

Similar sizing applies to the FET. The circuit must dissipate the energy stored in the FET drain-to-source and drain-to-gate capacitances. And a large FET requiring excessive gate charge will slow down the rise/fall times thereby increasing switching losses. So, the FET should not be too big and it should not be too small. Too small and the Ron losses may dominate.

As long as it doesn't cause the transformer to saturate, reducing the switching frequency can increase the flyback efficiency and increase the maximum power capability (by storing more energy per cycle).

The TTR of 1:12 seems alright. In simulation you can experiment with different ratios and see how it affects efficiency and component selections.

You already have the most important transformer parameters, primary inductance and leakage inductance. The shunt capacitance transformer model can be found with it out of the circuit. A crude but effective test is to apply a low DC voltage across a winding then disconnect it while observing the ringing on an oscilloscope. From the ringing frequency and the winding inductance the shunt capacitance can be calculated and incorporated into the SPICE model. Note that the oscilloscope probe capacitance should be subtracted. The primary-to-secondary capacitance can be measured with a capacitance meter.

The fact that adding the snubber did substantially improve the current waveform shows that the leakage inductance and diode capacitance dominate.

Emre Celik,

here is a SPICE model with the flyback supplying 241 watts at 240 volts. The FET Rds ON is 4 milliohms and I assigned 0.01 ohms to the transformer. Do you have numbers for transformer primary and secondary resistance?

The efficiency is 92% with the greatest loss being in the leakage inductance clamp (9.3 watts). The input RC (R3 and C4) to reduce ringing (leakage L and FET C) consumes 3.4 watts while the output diode RC consumes 1.5 watts.

Running the simulation with generous transformer capacitances (50 pF output to GND, 50 pF primary-to-secondary, and 1 nF primary shunt) has little effect on the waveforms or the efficiency.

This confirms that the five transformer parameters needed for a realistic simulation are primary inductance, turns ratio, leakage inductance, primary resistance, and secondary resistance. This follows typical application notes and design articles that ignore transformer capacitances.

Delivering 240 watts the primary current reaches 23 amps. If your transformer saturates at 10.5 amps your flyback is limited to less than 60 watts.