How to Reduce High Frequency Ringing on LT3751 HV Flyback Converter Switch

Hello All,
I'm working on the design of a high voltage cap charging flyback converter circuit based on the LT3751 Capacitor charger IC from ADI. I built up a test board to vet the functionality of my circuit and noticed there was some high frequency ringing on the power transistor which was creating unwanted noise in other parts of my design. I then proceeded to design the standard RC and RCD snubber network to try and eliminate the high frequency oscillations that were showing up, but to no avail.This particular waveform is particularly troublesome because of the multitude of harmonics, along with a very fast, 12ns HV spike right after the initial turn-off. It seemed that no matter what RC combination I placed on the switch, the amplitude of the initial spike was not reduced at all.  I attached a couple of scope shots of the waveform in question and was wondering if anyone here ever ran into a problem snubbing waveforms like this?Just to share a bit more, the circuit takes 12 V input and steps it up to 430 V. The input current is fixed at 42 A to maximize the charging speed of the output capacitor.- Jason O

Hi Jason,
Perhaps you could share just a bit more information. Schematic/BOM would be helpful, but at the very least the magnetics and FET you're using. The peaks you're seeing here are not what I would expect to see. Does the waveform change at all when you add a snubber or is it staying exactly the same?What's your startup look like? First few strokes could be informative. Also, is this on fiber or are you breadboarding?Regards,Other Jason

You don't say what your experience is in designing SMPS's. It is a very specialized subject, with many pitfalls, so some indication of your background in the subject would help.Would you give a bit of feedback on the following issues for a start.Did you buy an off the shelf transformer, or wind it yourself. In either case, leakage inductance needs to be low, which requires particular care in how the transformer is wound.Do ADI have a preferred PCB layout, again, it is critical to how the circuit performs. How you use an oscilloscope is another issue, it must have a ground probe directly adjacent to the probe tip (no long earth lead), Tek scopes usually have such probes.Cheers,
Richard

Hello Jason,
Thank you for your response. I have provided a simplified schematic of the boost converter showing the components I'm using, along with specs for the input signal and transformer below:
As for the snubber situation, I have tried several different RC combinations (R values from 5 Ω to 1 kΩ and C values from 100 pF to 10 nF). I also just added a C value and increased it to determine the characteristic impedance of the circuit to place optimized values. One challenge here is the harmonic-rich ringing waveform. I had to display an FFT to see which frequency components were even responding to the C value at all. The lowest harmonic did move as I increased C, but all the higher harmonics (including the large initial spike), seemed to be impervious to any snubbers I added.Later, I was able to cut down the spike significantly by adding a 50 Ω resistor in series with the MOSFET gate. But of course, this is more of a band-aid than a solution because of the increased power dissipation in the FET killing the efficiency of the converter. Here's an updated scope shot showing the difference in the drain waveforms before and after the 50 Ω resistor was added:

Drain Waveform without resistor (gray), and with resistor (cyan)
Also, to answer your question about the startup waveforms. Here's a scope shot showing them below:


The green trace is the output voltage across C22, the yellow trace is the current on the 12 V line between the power supply and C11. The cyan trace shows the voltage drop across R4, the shunt resistor, and the purple trace is the Gate to source waveform measured at the MOSFET.Here's another scope shot showing the initial pulse waveforms closer up:
The initial ringing period of the cyan trace is 9.9 µs witha peak amplitude of 124 mV.
Here'another scope shot showing the waveforms in the middle of the charge cycle:
At the middle of the charge cycle, the peak voltage across the shunt is 208 mV, which corresponds to 83.2 A (double the designed max peak current).
Lastly, here's a scope shot of the waveforms near the end of the charge cycle:

Hopefully this is helpful information. Also, concerning the circuit board, the design is laid out on a two-layer PCB, not a breadboard or perfboard. However, I'm planning to redo the layout after determining what needs to be adjusted on the current design.

Hello Richard,
Regarding my experience with SMPS designs, my expertise area is actually in embedded systems hardware and software design. I do also have a lot of experience working with High voltage switching circuits, but this is the first flyback converter that I've had the opportunity to design from scratch. I know a lot about the basic design "rules of thumb", but I don't have a lot of bench experience dealing with noise filtering and suppression techniques (beyond the basic bypass caps, snubbers, or ferrite beads). 
As for the transformer, it is an off-the-shelf model that was customized for the design (the main change being magnet wire with higher insulation strength to handle the higher output voltage). The transformer is wound according to the recommended transformer from the LT3751 datasheet. I've attached the datasheet that was provided to us from the supplier.
I'm currently in contact with the suppler to confirm how it was physically wound.As for layout, yes, ADI did have a suggested PCB layout, which I followed as closely as possible. The main difference was that the transformer we are using is physically larger than the one in the datasheet so there is a bit more distance in the primary current loop than there could be (this will be corrected in the next version of the circuit).

As for the scope. Yes, this was initially a big issue. I do have Tek probes with spring tip grounding leads, which I am using to minimize noise coupling to the signals.

- Jason O

This can  happen due to the poor   filter cap in the osc stage power supply,  wrong   RC value in the osc stage,osc freq tuning hi  . non standard core/ winding of the transformer , vibration of the core of the x mer, lack of proper  shielding in the pcb. provide diodes across collector and emitter of the out put transistor cathodecoming on the + of the supply on the tr.  this can also happen  due to the ac trigger pulse cap or zener in that area connected to the driver transistor and the omponents connected to the base switching circuit of the out put transistor.sambath