Why Does Clipping Start With a 2.85 Volt Ouput Ehen Vceg = 5.4 Volts?

Hello:

I have a simple common-emiiter voltage amplifier with a gain of 10. The emmiter resistor is partially bypassed.

R1 = 3..9 K R2 = 1.5K RC = 3.3K RE1 = 1.5K RE2 = 120 RL = 2.2k

C1 = C2 = C3 = 47uF

Transistor = 2N3904 

Vcc = 20 V, Vc = 10.3 V, Ve = 4.8 V, Vb = 5.5 V, Vceg = 5.4 V and Icg = 3 mA. I thought that the upper and lower

clipping levels would be 5.4 V.

When I feed a 285 rms mV sine wave into the input, I obtain a 2.85 vrms output, it is at this point that clipping begins. Any help would be appreciated. 

Thnaks,

John

 

 

Hi,

_"The clipping levels of a single-stage amplifier are caused by over driving the transistor so that it either saturates or cuts off. Ideally, an amplifier should be designed so that it exhibits symmetrical clipping."_

check this reference: https://leachlegacy.ece.gatech.edu/ece3050/notes/bjt/bjtclipsu08.pdf

Is this a real device behaving this way, or just a simulation. The schematic shows a short across the capacitor, which will upset all of the bias conditions if it is just a simulation. When dealing with clipping issues, peak to peak values are more useful than RMS, and an indication if the clipping is symmetrical or asymmetrical. Additionally, looking at the output where you have removed the DC component via the capacitor doesn't help in identifying the problem, since you have removed the dc level,
cheers,
Richard

This is a real circuit. I am actually probing the output at the collector.

The ouput voltage is 7.92 p-p when clipping starts. Vceg is 5.4 volts. Does Vceg not determine the clipping levels. I must be missing something here.

This circuit design is from an old Heathkit course. It claims to have a centered Q-point.

John

With the values you have on the schematic, the gain is approximately -Rc/Re, so it is nearer 2. The collector load resistor is also quite small, this transistor configurations likes a larger load on the collector. Is the schematic correct, or have you different values on the real circuit.
If you need a gain of ten, then R2 and the emitter resistors need reducing, although that is a rather blunt instrument sort of approach, a bit of maths is required,
cheers,
Richard

If you want a gain of 10, as a quick play, take Re down to 330 ohms, R2 down to 330, and Rload up to 100K. Ignore the emitter bypass cap at this stage, remove the cap and R used in the circuit altogether.
Cheers,
Richard

Thanks for your comments Richard. I will take your advice. will let you know what happens.

John

As I said, you need to recalculate all of the values.
The base bias resistors (approx R1//R2) need to be high enough not to load the signal generator appreciably, so R2 needs to be increased along with R1, to provide the correct bias along with minimum loading. If the sig gen is 50 ohms, then 1K or more is probably reasonable.
These simple circuits are often only really useful for simple experiments.
See this note for some pointers,
http://www.colorado.edu/physics/phys3330/PDF/Experiment7.pdf
If you need to drive a low impedance output, then a voltage follower stage may be needed, with feedback around both transistors. Transformer coupling has also been used extensively.
Cheers,
Richard