Where did the – 0.7 V on the graph came from? (Clamper Diode Circuit)

I am currently studying how Diode Clampers works.  (Sorry for the newbie question.)
Regarding the picture on the attachments.  On the result waveform after applying clampling / shifting techniques, I am wondering where did the -0.7 V on the graph came from?
On the negative alternation, the Vp(out) is equal to 0 V as no current flows through the load resistor.On the positive alternation, the Vp(out) is equal to 2 Vp(in) - 0.7 from KVL (Vp(in) + Vp(in) - 0.7 - Vp(out) = 0)The Vp(in) - 0.7 on the graph shows the new / considered / assumed origin to show that the waveform did not change shape but only shifted upwards. But I have no Idea why the -0.7 V is labeled there? Wherein on the negative alternation, there was no 0.7 V to get but only the 0 V from the load resistor, hence why the negative part shifted there..
Again, sorry for the newbie question but I would appreciate any help. Thank you in advance.

JC... The key to this is a silicon diode will have 0.7V across it when it forward conducts.  But I still have a problem with your waveforms.- in a case where the peak input voltage VPin is up to 0.7V, the diode won't conduct in either direction and you'll get a nice AC waveform across your RL.  The exact voltage will depend on the values of the capacitance and RL, but it will be symmetrical and the same shape as VPin.- in a case where the peak input voltage VPin is above 0.7V,  but not much more,  the diode will conduct for part of the negative half cycle and limit the negative voltage to 0.7, but the positive voltage on the load will be more than VPin, because the capacitor charges on the negative half cycle as in your first diagram, and will add to the VP when it goes positive.  The reason this circuit is called a Clamp is that it "clamps" the negative voltage across the load to a maximum of 0.7V, and it's sometimes used in signal circuits for this purpose.
- in a case where the peak input voltage VPin is a lot more than  0.7V (say ten times that or more), the diode will conduct for most of the negative half cycle and charge the capacitor to (VPin - 0.7).  on the positive half cycle this voltage will add to the VPin and you will get almost 2 x VPin across the load. For this reason this circuit is sometimes used as a voltage doubler to generate almost 2 x the value of an AC input voltage. Usually there will be another diode and cap following the first ones.I'll try and do some more diagrams to explain this better but I'm short of time, and diagrams don't post very well here except in the initial post. PS sorry I did post some diagrams but they were wrong   I'll re-do them and re-post when I can.

JC....sorry, been really busy, have not heard from you so not sure if you're still there, but here goes.As your first diagram shows, when the input voltage first starts, lets assume it goes negative.  Forget about RL for the minute.  As the input voltage goes more and more negative, the diode will conduct and the capacitor will charge.  The diode has a maximum voltage of 0.7 across it when forward biased and conducting.  So at the peak negative input voltage Vp(in), the diode will have a voltage of 0.7 across it and the capacitor will have charged to a voltage of Vp(in) - 0.7 as shown here. (This is Kirchhoff's law at work!)
Now lets look at a point about 3/4 along the negative half cycle, when Vin is about 1/2 the peak value.  To make things clearer I've disregarded RL for the moment.  And to make things easier to calculate, I've assumed that Vin has a peak value of 100V.  So Vin is now 50V.  In the previous diagram, the capacitor has charged to 100-0.7 v = 99.3 V with the polarity shown.   There is no current flowing, so the capacitor holds its charge.  The diode is now reverse biased (hence no current flow.  Adding our voltages from ground, Vin is -50V, the cap has +99.3V, so the voltage across the diode is 49.3V, polarity as shown.
Now lets go on to the peak positive point of the input waveform.  Again I've used 100V as the value, so the input is at +100V.  the capacitor has not lost any charge (I've disconnected RL) so the input voltage and the capacitor voltage are now adding - 100V + 99.3V = 199.3V.  The diode is still reverse biased (hope you used a diode with a good peak inverse voltage!).   This diagram is just your bottom diagram with a bit more notation added.
So you can now see how the circuit "clamps" the bottom of the input waveform to just under 0V - actually to -0.7 volts which is the forward voltage of our diode.  This can be useful to e.g. shift nearly all of an AC waveform into the positive so it can be sampled by an ADC, for example.What happens when we add the load resistor?  A current will then flow at all times and will tend to discharge the capacitor during the cycle, which will tend to reduce the output voltage a bit, how much depends on the load and how much current it takes.  You can see how this circuit can be used as a voltage doubler with the addition of one more diode and one more cap:
The right hand cap will charge to 2 x Vin (pk) less the 2 x 0.7V drop of the diodes.  
JC I hope that has helped, sorry again for the delay.  This has taken me a bit of time so would appreciate some feedback.  Cheers // David

JC...PS...you said... "Sorry for the newbie question."We were all Newbies once.  In my case it was a long time ago.  I had to think a bit before posting the above answer, so it was good revision for me as well.  SO no need to apologise, that's what this forum is for!