STM32F429 PCB: SDRAM FMC 90MHz and LAN8742A RMII Routing, Length Matching, Impedance

Hello everyone,
I'm new here so first things first; my name is Marcel, I design embedded systems from concept to (mass)producable products (at least, that is the intention hehe).


I design pcb's from time to time (most of my work is software), but this time it's a bit different. I need to design a pcb with a lot of interfaces including an ethernet interface and an on-board SDRAM. 
I'm using a STM32F429 as CPU. For ethernet I use the LAN8742A as phy. The SDRAM is connected to the FMC (flexible memory controler) of the STM. The FMC is running at 90MHz.


My question is the following:
What are the rule of thumbs to keep in mind when routing? 
It's a "simple" SDRAM (no DDR), so how important is length-matching? And if so, which nets should be matched? Clock regarding to address bus?  And how much can the length mis-match than be? 
And what about the impedance of the tracks? 
I've included an attachment which shows how the current routing of the SDRAM interface is done.


For RMII I'm facing the same problems. 


My layer stack-up is the following:
Top: HS signals  18um
Prepreg 0,24mm
GND 35 um
Core 0,36mm
LS signals 35 um
Prepreg 0,24mm
LS signals 35 um
Core 0,36mm
PWR (3V3) 35um
Prepreg 0,24um
Bot: HS signals 18um

PCB designis worth downloading and reading.Cheers,Richard

I'm not familiar with the STM32F429 but have you checked their web site for application notes or technical guides for layout?You might also check the manufacturer's sites for the phy and SDRAM to see if they have application guides.

Richard, thanks for posting this link. I attended the tutorial at ESC last year and am glad to see the material is available.