I'm looking for help with a fictional application. I used to do 8080, Z-80, 8088 and 8086 assembly, but purely on the SW side. I remember interrupt handling, polling reserved memory locations, writing to a 512x512 plasma panel through mapped memory, and transfering data over a serial or parallel interface by writing to reserved memory locations, all in assembly. But the electronics of interfacing are a mystery to me.
So here's the fictional scenario: it's 1981 and I'm an EE graduate working in a university lab. I've got a CP/M or CP/M-86-based system with an 8088 or 8086. Would that be kit-built? Would it involve wire-wrap? Is some other system more likely? It's not an off-the-shelf system, in any case.
I've got carte blanche in physically modifying an upright piano to monitor performance information, but I mustn't compromise the sound or touch. At a minimum, I need key-down and key-up signals for all 88 keys and 3 pedals. I'd like to get strike-force or key-speed information as well. It occurs to me that key speed might be monitored by optical markings or the heads of tiny brads on the front vertical surface of the keys and replacing the wooden front rail with an optical or magnetic sensor array.
For each event, I need to record event-id and clock time. If not playing chords, each hand might play a max of 10 notes per second, so that's 40 events/second. If playing chords, there's a theoretical max of 2 x 5 x 10 notes per second, or 100 notes, i.e. 200 events / second. Such a high data rate would be very rare, but could the processor handle it at those days' clock speeds?
Given the price of memory back then, I'd periodically be writing to an 8- or 5.25-inch floppy while monitoring.
How did making or breaking an analog circuit get translated into a digital interrupt? Or how would a microcomputer poll an analog circuit--or in this case, 91 of them? What are the trade-offs of the two approaches? How many times per second could an assembly program poll 100 memory locations (or some other interface mechanism) at those days' speeds?
What all hardware of that time would be needed for any given approach, and what would it likely have cost?
So here's the fictional scenario: it's 1981 and I'm an EE graduate working in a university lab. I've got a CP/M or CP/M-86-based system with an 8088 or 8086. Would that be kit-built? Would it involve wire-wrap? Is some other system more likely? It's not an off-the-shelf system, in any case.
I've got carte blanche in physically modifying an upright piano to monitor performance information, but I mustn't compromise the sound or touch. At a minimum, I need key-down and key-up signals for all 88 keys and 3 pedals. I'd like to get strike-force or key-speed information as well. It occurs to me that key speed might be monitored by optical markings or the heads of tiny brads on the front vertical surface of the keys and replacing the wooden front rail with an optical or magnetic sensor array.
For each event, I need to record event-id and clock time. If not playing chords, each hand might play a max of 10 notes per second, so that's 40 events/second. If playing chords, there's a theoretical max of 2 x 5 x 10 notes per second, or 100 notes, i.e. 200 events / second. Such a high data rate would be very rare, but could the processor handle it at those days' clock speeds?
Given the price of memory back then, I'd periodically be writing to an 8- or 5.25-inch floppy while monitoring.
How did making or breaking an analog circuit get translated into a digital interrupt? Or how would a microcomputer poll an analog circuit--or in this case, 91 of them? What are the trade-offs of the two approaches? How many times per second could an assembly program poll 100 memory locations (or some other interface mechanism) at those days' speeds?
What all hardware of that time would be needed for any given approach, and what would it likely have cost?
