Hardware design to count number of ones in 32-bit binary input using logic gates

Hi guys, I want to design hardware implementation by using whatever logical gates(adder/full adder/monitor slave whatever implementations) to output the number of ones in binary 32bit number .. may please anyone give me any hint? or a link for how to design like this implementation ?
in brief I want a hardware design which I input to it 32bit binary number and the output of it will be the number of ones in 32bit binary number that I entered it to the design ... any help pelase?

This is called a "tally circuit".  If you want to do this fast, my favorite way is using a reduction tree, similar to what is done in combinational multipliers.  See the Wikipedia articles on:Wallace treeDadda multipler
In both cases you are using full adders to count groups of three bits A, B, and C to produce a 2-bit number <T, S> where S is the sum "A xor B xor C" and T is the carry "maj(A, B, C)".  The T bit has a weight of 2 and the S bit has a weight of 1.  Mathematically, "2*T + S = A + B + C" where "+" is plus, not OR.
To do a 32-bit tally, you count bits using ten full adders, reducing a column of 32 bits down to two columns with a total of 22 bits.  10 of these have a weight of 2, 12 have a weight of 1.  You do the same thing again, combining the weight 2 bits in one sub-tree and the weight 1 bits in a second sub-tree.  The articles have diagrams showing the idea.
After doing this several times, you have reduced the column of 32 bits of weight 1 into two rows.  Add these two rows using your favorite adder and you're done.A full adder reduces 3 bits to 2.  If you're using FPGAs with 4-input look-up tables, you can reduce groups of 4 bits.  If your FPGA has 6-input LUTs, you can reduce groups of 6 bits.  This will reduce the height of the reduction tree.

John beat me to this -- one thing I was going to ask is whether your solution had to be fully combinatorial or if it could be sequential?By combinatorial, I mean that you have a bunch of logic gates -- you feed the outputs from your 32-bit register in one end, and out of the other end comes a 6-bit binary value representing the number of 1s. In this case, John already answered your question.If you could use a sequential (clocked) solution, then one way would be to load the contents of your 32-bit register into a 32-bit shift register, then keep shifting it left (or right) using the 1's "falling off the end" to increment a 6-bit binary counter.