FAN7842 Bootstrap Gate Driver Placement: Closer to MCU or Power FETs?

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#1 21659753 14 Sep 2011 12:03

Erik Hatinen Erik Hatinen

Anonymous

Post #1
21659753 14 Sep 2011 12:03

I have a half h-bridge motor drive with a hi/lo bootstrap ic (ie FAN7842)driving the gate of the fets. The whole circuit is controlled by an MCU. Should the bootstrap ic and associated circuitry be located closer to the MCU or to the drive fets which are approx 8inches away from MCU? I have my opinion but I am wondering what others think and why.
Thanks,
Erik
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#2 21659754 14 Sep 2011 12:21

Cody Miller Cody Miller

Anonymous

Post #2
21659754 14 Sep 2011 12:21

Hi Eric,

I have attached an example application from the datasheet to this comment so others can visualize the circuit.

I typically try to make high current traces to be as short a distance as possible. Since the outputs can sink 650mA, I would try and keep them very short. I would place the bootstrap IC as close to the FETs as possible. I like to limit the length of high voltage traces as well to minimize potential safety issues.

One of the reasons for limiting the length of high current traces is to minimize the current loop area which can cause EMI/EMC issues. Often EMC issues can be traced back to the layout of the highest current drivers on a board.
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#3 21659755 14 Sep 2011 13:06

Erik Hatinen Erik Hatinen

Anonymous

Post #3
21659755 14 Sep 2011 13:06

That is exactly the circuit. Thanks for the clarification!
#4 21659756 14 Sep 2011 13:58

Martin Thompson Martin Thompson

Anonymous

Post #4
21659756 14 Sep 2011 13:58

I would also put the gate driver close to the FETs.

You may need to be a little careful of the micro outputs if they are high slew-rate as an 8in trace could be significant related to the transition time. IF you don't treat the traces as transmission lines, you may get multiple crossing of the gate-drive IC input thresholds...
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#5 21659757 14 Sep 2011 14:21

Alec Alec

Anonymous

Post #5
21659757 14 Sep 2011 14:21

Yes, keep the gate driver (bootstrap) IC outputs close to the FETs being driven.

The gate driver outputs are likely low output impedance, high current, high slew rate lines while the gate driver inputs from the MCU are likely just high input impedance, low current, signal lines. Transmission line impedance will matter much more for the former than the latter.
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#6 21659758 14 Sep 2011 14:28

Martin Thompson Martin Thompson

Anonymous

Post #6
21659758 14 Sep 2011 14:28

Maybe I use different micros then, I often see 1ns rise/fall times on the pins - not high-impedance or low current! But certainly the gate driver will suffer much more from having inductance in series between it and the gates.
#7 21659759 14 Sep 2011 14:41

Alec Alec

Anonymous

Post #7
21659759 14 Sep 2011 14:41

I was speaking about the gate driver inputs likely being high impedance, not the output pins of the MCU.

I was basically just saying that most likely the boostrap IC doesn't demand a lot of input current from the MCU, but that the gates of the FETs probably do (depending on gate charge, frequency, switching voltage, etc.).

As far as ringing on the input of the boostrap IC due to the high slew rates of the MCU outputs, that is certainly feasible. As you said, possibly resulting in multiple crosses over high and low input thresholds of the boostrap IC. If that ended up being an issue, something like a one-shot IC close to the inputs of the bootstrap IC could fix it if its delay time was adequately set. Not that adding another IC is usually a desirable consequence of board layout issues.
#8 21659760 14 Sep 2011 15:26

Martin Thompson Martin Thompson

Anonymous

Post #8
21659760 14 Sep 2011 15:26

If I were running potentially nasty edges over 8in of trace, I'd simulate it first with an IBIS simulator and terminate the lines properly. No one-shots required
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Topic summary

In a half H-bridge motor drive using the FAN7842 bootstrap gate driver IC controlled by an MCU, the consensus is to place the bootstrap IC and associated circuitry as close as possible to the power FETs rather than the MCU, which is approximately 8 inches away. This placement minimizes the length of high current and high voltage traces, reducing current loop area and potential EMI/EMC issues. The gate driver outputs are low impedance, high current, and high slew rate signals, making short trace lengths critical to avoid inductance and ringing. Conversely, the MCU outputs driving the bootstrap IC inputs are typically high impedance and low current, so longer traces are less problematic but may still require careful signal integrity considerations. If high slew rates on MCU outputs cause signal ringing or multiple threshold crossings at the bootstrap IC input, solutions include simulation with IBIS models and proper line termination rather than adding extra components. Overall, layout prioritizes minimizing high current path lengths near the FET gates to ensure reliable switching and electromagnetic compatibility.
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FAN7842 Bootstrap Gate Driver Placement: Closer to MCU or Power FETs?

FAN7842 Bootstrap Gate Driver Placement: Closer to MCU or Power FETs?

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