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Phase Sensitive Detector circuit troubleshooting and recommended PSD circuit designs

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  • #1 21661032
    John Savage
    Anonymous  
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  • #2 21661033
    DAVID CUTHBERT
    Anonymous  
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  • #3 21661034
    John Savage
    Anonymous  
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    Anonymous  
  • #5 21661036
    John Savage
    Anonymous  
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  • #6 21661037
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    Anonymous  
  • #7 21661038
    John Savage
    Anonymous  

Topic summary

The discussion addresses troubleshooting a Phase Sensitive Detector (PSD) circuit derived from a book, focusing on issues related to the switching section. The input signal frequency is 50 Hz, while the 555 timer used as the reference oscillator runs at 50.2787 Hz with a 58.2% duty cycle, causing a slight frequency offset. This offset results in a waveform that appears reasonable but does not produce the expected full-wave rectified output smoothed by the low-pass filter (LPF). The circuit performs a differential to single-ended conversion before the phase detection stage, yielding a DC output component of approximately 250 mV. The phase detector integrator has a 22 ms time constant, which may not be visible on the oscilloscope settings used. Clarification on the switching mechanism and frequency synchronization is implied as critical for proper PSD operation. No alternative PSD circuit designs were explicitly recommended in the responses.
Summary generated by the language model.
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