Logic Circuit Delay for 80 MHz Clock: Evaluation

I have designed a circuit to delay a 80Mhz TTL clock, using schmitt invertor logic and a switch, the schmitt inverter logic gives a transition delay of around 3 nano sceconds, so for a six gate IC give's 18 nanoseconds in 3 nanosecond steps.

as the file attached shows

The question I have is how will the pulse detorate as it progresses thru the circuit, can it go on for ever, I know there may some detoration of the signal as it passes thru the logic gates but i'm not sure quite what