Hi,
I recently saw the following symbol described as a tri-state gated buffer or something similar. It had three logic signals attached to it. (not Y) to the bubble on top, X to the middle and Y to the bottom connection. The output went to another regular logic gate. I've seen regular tri-state buffers before and I've found plenty of them from searching online, but nothing like this. I did find a graduate student paper that used a similar symbol for an SR latch in a memory circuit but it didn't describe much about it.
Nevermind, I found it. It's a CMOS transmission gate.
http://www.youspice.com/ys/en/project/cmos-transmission-gate.3sp
Thanks
I recently saw the following symbol described as a tri-state gated buffer or something similar. It had three logic signals attached to it. (not Y) to the bubble on top, X to the middle and Y to the bottom connection. The output went to another regular logic gate. I've seen regular tri-state buffers before and I've found plenty of them from searching online, but nothing like this. I did find a graduate student paper that used a similar symbol for an SR latch in a memory circuit but it didn't describe much about it.
Nevermind, I found it. It's a CMOS transmission gate.
http://www.youspice.com/ys/en/project/cmos-transmission-gate.3sp
Thanks