Hi, i need someone to check if i build this nand circuit correctly with regards to the Boolean expre

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#1 21679727 12 May 2018 22:27

NYAME EPHRAIM MECHANE NYAME EPHRAIM MECHANE

Anonymous
Post #1
21679727 12 May 2018 22:27

Hi, i need someone to check if i build this nand circuit correctly with regards to the Boolean expression !

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#2 21679728 13 May 2018 05:05

PeterTraneus Anderson PeterTraneus Anderson

Anonymous

Post #2
21679728 13 May 2018 05:05

There are six terms in your equation, but only five lines in your truth table show output=1, so there is an error in your truth table. Also, you need to label the inputs to your circuit diagram so we can know which input is which.

When I started teaching myself logic design in 1973, TTL multiplexers and decoders were available, so I would have built this function using a 7442 BCD-to-decimal decoder with active-low outputs and a 7430 eight-input NAND gate.
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#3 21679729 13 May 2018 23:07

NYAME EPHRAIM MECHANE NYAME EPHRAIM MECHANE

Anonymous

Post #3
21679729 13 May 2018 23:07

Hi peter thanks for the replyplease find the label diagram here
#4 21679730 14 May 2018 05:16

Richard Gabric Richard Gabric

Anonymous

Post #4
21679730 14 May 2018 05:16

Hi,you need to step back and acknowledge Peter's comment about the truth table before you go any further.There is either an error in the second line of your question where D=, the *A*BC term is not present in the truth table, so either that term should not be there, or the truth table is in error. It is implied from the simplified expression after the truth table that the *A*BC should not be there, but if an error has been made, then you cannot assume that the truth table and the subsequent expression after it are correct.If the truth table is correct, then you need to change the initial equation, and all you need to do to verify your logic is correct is to work your way through the truth table, setting each of the inputs A,B and C from each line of the truth table, and see what you get at the output, it should correspond to the truth table. Do all of that and then get back to the forum if you are still having a problem,all the best,Richard
#5 21679731 14 May 2018 13:59

David Ashton David Ashton

Anonymous

Post #5
21679731 14 May 2018 13:59

Ephrem
The initial question you posed mentions using a Karnaugh Map. When you're asked to do this, you should, not doing it will lose you marks.It's cheating a bit I suppose, but there is a Karnaugh Map generator at http://www.32x8.com
However it generates a circuit using ANDs and ORs, so you will have to apply the rules and do it using NANDs, which is also a good exercise.
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#6 21679732 14 May 2018 19:19

NYAME EPHRAIM MECHANE NYAME EPHRAIM MECHANE

Anonymous

Post #6
21679732 14 May 2018 19:19

Hi Richards thanks for the reply, during my simulation only 001 which appear to be zero the truth table, the result was also zero in my simulation,
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#7 21679733 14 May 2018 21:52

Elizabeth Simon Elizabeth Simon

Anonymous

Post #7
21679733 14 May 2018 21:52

First, it appears that your NAND gate circuit matches the truth table but the truth table does NOT match the original Boolean expression so your NAND gate circuit does not match the original expression. The 001 line should be 1 and not 0.
Also as David said, the original question calls for using a Karnaugh map.https://en.wikipedia.org/wiki/Karnaugh_map
#8 21679734 16 May 2018 22:52

NYAME EPHRAIM MECHANE NYAME EPHRAIM MECHANE

Anonymous

Post #8
21679734 16 May 2018 22:52

Hi Elizabeth,please i asked you to show me demonstration on how i can connect those two curves in my graph,in addition do i need to connect the voltage gain and frequency respond like this ?
#9 21679735 18 May 2018 01:38

Max Maxfield Max Maxfield

Anonymous

Post #9
21679735 18 May 2018 01:38

Hi Ephraim -- check out the article I just posted -- it answers your questions re the logic function in exquisite (some may say "excruciating") detail:
Implementing Logic Functions Using Only NAND or NOR Gates
https://www.eeweb.com/profile/max-maxfield/ar...-logic-functions-using-only-nand-or-nor-gates
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Topic summary

The discussion centers on verifying the correctness of a NAND gate circuit implementation relative to a given Boolean expression and its associated truth table. It was identified that the truth table contains inconsistencies, specifically a mismatch between the number of terms in the Boolean expression and the output lines marked as logic high. The input labeling on the circuit diagram was requested for clarity. Participants emphasized the importance of reconciling the Boolean expression with the truth table before further circuit validation. The use of Karnaugh maps was recommended to simplify and verify the logic function, with a suggestion to convert the resulting AND-OR expressions into NAND-only implementations as an exercise. References to TTL logic components were made, including the 7442 BCD-to-decimal decoder with active-low outputs and the 7430 eight-input NAND gate, as potential hardware solutions. Additional resources on implementing logic functions exclusively with NAND or NOR gates were shared to aid understanding and design accuracy.
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Hi, i need someone to check if i build this nand circuit correctly with regards to the Boolean expre

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