Hi, i need someone to check if i build this nand circuit correctly with regards to the Boolean expre

Hi, i need someone to check if i build this nand circuit correctly with regards to the Boolean expression !

There are six terms in your equation, but only five lines in your truth table show output=1, so there is an error in your truth table. Also, you need to label the inputs to your circuit diagram so we can know which input is which.

When I started teaching myself logic design in 1973, TTL multiplexers and decoders were available, so I would have built this function using a 7442 BCD-to-decimal decoder with active-low outputs and a 7430 eight-input NAND gate.

Hi peter thanks for the replyplease find the label diagram here 

Hi,you need to step back and acknowledge Peter's comment about the truth table before you go any further.There is either an error in the second line of your question where D=, the *A*BC term is not present in the truth table, so either that term should not be there, or the truth table is in error. It is implied from the simplified expression after the truth table that the *A*BC  should not be there, but if an error has been made, then you cannot assume that the truth table and the subsequent expression after it are correct.If the truth table is correct, then you need to change the initial equation, and all you need to do to verify your logic is correct is to work your way through the truth table, setting each of the inputs A,B and C from each line of the truth table, and see what you get at the output, it should correspond to the truth table. Do all of that and then get back to the forum if you are still having a problem,all the best,Richard

Ephrem
The initial question you posed mentions using a Karnaugh Map.  When you're asked to do this, you should, not doing it will lose you marks.It's cheating a bit I suppose, but there is a Karnaugh Map generator at http://www.32x8.com
However it generates a circuit using ANDs and ORs, so you will have to apply the rules and do it using NANDs, which is also a good exercise.

Hi Richards thanks for the reply, during my simulation only 001 which appear to be zero the truth table, the result was also zero in my simulation, 

First, it appears that your NAND gate circuit matches the truth table but the truth table does NOT match the original Boolean expression so your NAND gate circuit does not match the original expression. The 001 line should be 1 and not 0.
Also as David said, the original question calls for using a Karnaugh map.https://en.wikipedia.org/wiki/Karnaugh_map

Hi Elizabeth,please i asked you to show me demonstration on how i can connect those two curves in my graph,in addition do i need to connect the voltage gain and frequency respond like this ?

Hi Ephraim -- check out the article I just posted -- it answers your questions re the logic function in  exquisite (some may say "excruciating") detail:
Implementing Logic Functions Using Only NAND or NOR Gates
https://www.eeweb.com/profile/max-maxfield/ar...-logic-functions-using-only-nand-or-nor-gates