Hi, I am new at this forum. I need help with an analog design that I have in mind but I am not sure how it will work. I am trying to create a way to measure the voltage of battery cells through trespassing the voltage of the battery cell to a capacitor and then reading the voltage from the capacitor; something like it is used to actively balance battery cells using four switches and a capacitor between two battery cells but instead of trespassing the voltage to the adjacent cell, reading the voltage out. Here I attach my idea. I already simulated in ltspice but it gives me a weird error (it is not what I expected). In the waveform you can see how the output voltage ranges from 6 to 8.4 V, which is not what I was expecting (0-4.2 V). In my mind, this circuit should behave in the following way: when M1 and M2 are closed and M5 and M6 open, the capacitor C1 should charge up to V2-V1. Then, M1 and M2 are open and M5 and M6 are closed, so the Vout will be this difference. What is wrong with my reasoning and why it is not working? Thank you very much for your help, I will appreciate it a lot!