Synchronous Counter questions

This circuit is suppose to spell out "CLUE" and repeat. I can get it to work great on multisim. But when I physically build the circuit. It doesn't work.
It spits out a seemingly random "CLCECULECLECU" Those letters are in no particular order everytime. It's something different everytime other than "CLUECLUE..."
I checked my wiring ALOT, over and over....then checked it over and over again.
I swapped both 74LS76 IC's, samething. Swapped them again with another pair, samething.
I swapped the 7 Seg display, samething.
I moved the circuit to a different part of the breadboard, and alas, same thing again.
I know the diagram is correct, and it works 100% on Multisim.
Question about the Function Generator, too. I applied a 5V square wave, but it also goes to -5V below the 0V line. Would this be an issue? If so, how can I get a positive only 5V.

About the -5V, yes, that can be an issue... it can break your ICs which are TTL and have quite strict Voltage constraints.

I'm guessing on your function generator you set the shape of the wave, amplitude and DC offset (phase offset is irrelevant in your case). If the amplitude is peak to peak you should set it to 5V if it's half peak to peak (usually from peak to mean value) you should set it to 2.5V. In either of the cases the DC offset should be 2.5V that way the square wave will be from 0V to 5V. I can guess what type the amplitude you set is if you tell me what settings you used.

If that's the only issue it should be good to go after you set the function generator correctly (I haven't rechecked your circuit but I will out of curiosity).

Best of luck,
Dorin

Awesome, thanks. I hope I didn't break those ICs. Well if I did, I'll try to con some new ones. Thanks again.

You're welcome, no pain no gaine :)

If you never make mistakes you can't learn from them.

Yep - a -ve going clock will upset things.

The important thing to remember for future - is that the whole key to synchronous design is the absolute purity of the clock - indeed, on larger and faster circuits even the distribution of a clock becomes crucial.

"... experience is the name we give to our mistakes..." P Dirac.

Also, if you haven't already, you might consider adding a bypass cap: 0.1uFd ceramic from Vcc to Gnd as close to the 74LS76 as possible. That can make a difference, also (but the -5V to the clock is the main issue .