FAQ
TL;DR: With the emitter bypass capacitor fitted, AC gain shot from 20 mV in to ≈1.0 V out (≈50×). To hit 10×, “take that capacitor off the emitter resistor” and size RC/RE accordingly. [Elektroda, Anonymous, post #21679157]
Why it matters: This FAQ helps beginners set and verify a clean voltage gain of 10 in a single-transistor amplifier without clipping or DC offset.
Quick Facts
- AC gain with a bypassed emitter depends strongly on transistor hFE and exceeds 10. [Elektroda, Anonymous, post #21679156]
- Targeting 10× without bypass: Av ≈ RC/(RE + re), where re ≈ 26 mV/IE. [Elektroda, Anonymous, post #21679167]
- Proven example: RC ≈ 3.9 kΩ, RE ≈ 370 Ω, IE ≈ 1.3 mA produced ≈10× gain. [Elektroda, Anonymous, post #21679167]
- Test conditions discussed: 10–20 mV AC input at 1 kHz, VCC = 12 V. [Elektroda, Anonymous, post #21679160]
- Output coupling capacitor prevents DC offset at the load in this design. [Elektroda, Anonymous, post #21679168]
Does this amplifier reach a voltage gain of 10 as specified?
Yes. With the emitter bypass capacitor removed and RC/RE chosen correctly, the thread author measured 0.02 Vpp in and 0.20 Vpp out, giving ≈10× gain without clipping. [Elektroda, Anonymous, post #21679167]
Why was the gain much higher than 10 at first?
The emitter bypass capacitor reduces AC emitter resistance, so the stage’s AC gain rises well above the DC design value. As one expert put it, the AC gain then depends on the transistor’s hFE. [Elektroda, Anonymous, post #21679156]
How do I set the gain to 10 without the emitter bypass capacitor?
Use Av ≈ RC/(RE + re). Estimate re ≈ 26 mV/IE. Example: RE = 370 Ω, IE ≈ 1.3 mA gives re ≈ 20 Ω, so RC ≈ 3.9 kΩ yields Av ≈ 3.9 kΩ/390 Ω ≈ 10. [Elektroda, Anonymous, post #21679167]
What input and supply values worked during testing?
The tests used a small AC input of 10–20 mV at 1 kHz and a 12 V supply. These conditions kept the stage linear after biasing mid‑supply. [Elektroda, Anonymous, post #21679160]
How do I deal with DC offset seen in the simulator?
Keep the output coupling capacitor and the load resistor at the output. In the discussed circuit, the DC offset at the load disappears; the tool’s reading was a simulation artifact. [Elektroda, Anonymous, post #21679168]
How do I bias to avoid clipping?
Set the collector near half the supply (≈6 V on 12 V). This centers the swing. The thread confirms clean waveforms once biased and the gain set to 10. [Elektroda, Anonymous, post #21679157]
What is hFE and why does it matter here?
hFE is the transistor’s small-signal current gain. With the emitter bypass capacitor installed, AC gain becomes sensitive to hFE, pushing gain far above 10. [Elektroda, Anonymous, post #21679156]
How can I quickly verify the gain in my simulator or lab?
Measure peak‑to‑peak input and output on the scope and divide. Example shown: 0.02 Vpp in, 0.20 Vpp out → Av ≈ 10. Avoid relying only on RMS panel meters. [Elektroda, Anonymous, post #21679167]
What if I want a much larger gain (open gain) for a check?
Refit the emitter bypass capacitor and re‑measure. One capture showed ~996 mV RMS at the output from 10 mV input, which is ≈1.408 V peak, or ≈140× using peak values. [Elektroda, Anonymous, post #21679170]
Which resistor series should I use when selecting values?
Use preferred values (E12 first). If you need finer steps, move to E24/E48 or add a trimmer to dial exact gain. This approach was advised during the successful 10× setup. [Elektroda, Anonymous, post #21679167]
Is the simulator always trustworthy about DC readings?
Not always. An expert noted that the observed DC offset was an artifact. With a proper output capacitor and load, the measured load voltage was AC‑only. [Elektroda, Anonymous, post #21679168]
What’s a practical 3‑step process to hit 10× gain cleanly?
- Remove the emitter bypass capacitor. 2. Choose RC and RE so RC/(RE + re) ≈ 10 (re ≈ 26 mV/IE). 3. Bias the collector near 0.5·VCC and confirm Av using Vpp measurements. [Elektroda, Anonymous, post #21679167]
Can meter mode selection mislead my gain reading?
Yes. One note explained the panel meters showed RMS, not DC offset. Convert RMS to peak (×1.414) when comparing to scope peaks. [Elektroda, Anonymous, post #21679167]
What failure should I watch for after setting gain?
Watch for clipping if the collector is not biased near mid‑supply or if input drive is raised. The shared result showed clean output once centered. [Elektroda, Anonymous, post #21679167]
What frequency range was evaluated in the thread?
Examples used a 1 kHz sine input for measuring small‑signal gain and verifying waveform integrity around the targeted Av = 10. [Elektroda, Anonymous, post #21679160]
