How to Generate a Sine Wave Output Using 8-bit R/2R DAC on Arduino or PIC?

In EPE May 2017 there is a project for a turntable motor driver unit. One aspect of this project design piqued my curiosity: the sine wave produced by the 5-bit DAC . With this in mind I first replicated the R/2R network on a breadboard and connected to an Arduino. I have since increased the resolution to an 8bit R/2R DAC. Counting from zero to 65536 and back to zero again I have achieved an impressive looking triangle wave form.  The question is how do you achieve a sine wave output? 
I presume this is essentially a mathematics question. Answers in simplified maths for dummies would be greatly appreciated.
Thanks in advance.
Simon 

If you want a fixed frequency, the easiest thing to use is probably a look-up table. Generating the look-up table can be done manually (not recommended) or using Excel (export values as a .CSV text file and copy/paste them into your program), or using a little scripting in something like Python.
For variable frequency, you could calculate sines directly, but they are quite expensive. Stepping through the values in your look-up table faster or slower will work, but you will need to interpolate between them for a high-quality output.
In both cases, making a table where one cycle of the sine wave is represented by a convenient power-of-2 value (e.g. 256 values) will make the implementation more efficient, as dividing or multiplying by 2^n is very cheap (shift n bits right or left), as is calculating remainders (just look at the bottom n bits).

Hi Sean,
Thanks for your reply. You've given me a lot to think about and I've run a few more experiments on the Arduino using a look up table. However it's the calculations where I'm falling down. If I were to use a fixed frequency, say 50hz, how do I work out the required values for each 'step' in the waveform? 
Thanks again.
Simon 

Hi Simon-Look HERE or HERE.  I admit I've gotten lazy, so I use lookup table generators to do the dirty work for me.-Rick

https://en.wikipedia.org/wiki/Numerically_controlled_oscillator describes the mathematics you need. The system runs at a fixed clock rate, so you update your DAC output on every clock pulse. The phase accumulator is an N-bit binary adder which, each clock pulse, adds a fixed amount (the phase increment) to the previous accumulator value. When the phase accumulator overflows (indicating the completion of a cycle of the output frequency), the carry-out bit is ignored. The most-significant bits of the phase accumulator drive the address bits of the sinewave lookup table. The data output bits of the table drive the DAC.
The output frequency is equal to clock_frequency * phase_increment / (2^N).If you're short on memory, and can stand a bit more calculation, you can use just the first quarter-cycle of the sine table. Do you see how?

Hi Rick,That's fantastic! The wonderfully stepped sine-wave on my 'scope is  just what I wanted.  I fear the sine-wave maths might be beyond me but at least I can now move onto some more experiments and testing.

Thank you very much for your help.
Simon

Hi Peter,
Thank you for your comments.  There's a lot to digest here -  and it may well be far beyond my capabilities but I am grateful nonetheless.  I will try.
Regards
Simon

Simon... the lookup tables offered by Rick are great, but you asked for some simple Math.  Hopefully you will understand this.  A sine wave is calculated from the values for the sine of an angle from 0 to 360 degrees. So you can do this (I'm a lazy sod, so I got Excel to do it for me).  Now you have a 5-bit DAC, so you have 32 possible states (in binary from 00000 to 11111). So you list the 32 steps (in this case from 0 to 31), divide 360 degrees by 32 (you have 32 steps), take the sine of each angle, then multiply the sine value by 31 (because the maximum value you can generate is 11111 = 31), convert it to Binary and you'll generate your own value for the DAC.  I've done this below.  The DAC(1) column is just the basic value multiplied by 31,  All well and good till we get to the negative values, Excel gives us the two's complement value (to 8 bits).  Here you can use the 6th bit to indicate the sign (1= negative) and discard bits 7 and 8.  If your DAC can't do negative numbers (most can't) you just add 1 to the sine value (so instead of going from 1 to -1 it goes from 0 to 2) and do the same process (shown in the DAC(2) column.  Here are the results:

Step	Degrees	Sine	DAC (1)	DAC (2)
0	0	0.00	0	1111
1	11.25	0.20	110	10010
2	22.5	0.38	1011	10101
3	33.75	0.56	10001	11000
4	45	0.71	10101	11010
5	56.25	0.83	11001	11100
6	67.5	0.92	11100	11101
7	78.75	0.98	11110	11110
8	90	1.00	11111	11111
9	101.25	0.98	11110	11110
10	112.5	0.92	11100	11101
11	123.75	0.83	11001	11100
12	135	0.71	10101	11010
13	146.25	0.56	10001	11000
14	157.5	0.38	1011	10101
15	168.75	0.20	110	10010
16	180	0.00	0	1111
17	191.25	-0.20	1111111010	1100
18	202.5	-0.38	1111110101	1001
19	213.75	-0.56	1111101111	110
20	225	-0.71	1111101011	100
21	236.25	-0.83	1111100111	10
22	247.5	-0.92	1111100100	1
23	258.75	-0.98	1111100010	0
24	270	-1.00	1111100001	0
25	281.25	-0.98	1111100010	0
26	292.5	-0.92	1111100100	1
27	303.75	-0.83	1111100111	10
28	315	-0.71	1111101011	100
29	326.25	-0.56	1111101111	110
30	337.5	-0.38	1111110101	1001
31	348.75	-0.20	1111111010	1100

You'll notice some inconsistencies here - steps 7/8/9 have differences of 1 and steps 23/24/25 don't in the DAC(2) column.  This is due to excel (I hope) rounding off.  It will lead to some slight distortion in your waveform but with only 5 bits you'll get that anyway.
Years ago I came across another way of generating sine waves using a shift register (Look Ma, no microcomputers!).  If I can find this I'll post it below.

Simon this is a bit off track but you may be able to use it.  This is an idea I saw in Elektor magazine many years ago and used it to build a very precise 45-55 Hz sine wave generator for testing frequency relays at an electricity utility I worked for at the time.  All you need is a 4015 8-bit shift register and an inverter.  And a source of clock pulses.  The shift register then fills up with 1s, then fills up with 0s.  The resistors on the outputs are weighted to give the appropriate values for a sine wave.  I did a variation on this using 10 bits of Shift register so that my sine output was a submultiple of 10 of the clock frequency (the below is a submultiple of 8), and I recalculated the resistor values - I can't remember how except that it was fiendishly complicated, involving quadratic equations....You could use this circuit with a microcontroller if you're short of pins - just generate a clock frequency on one pin and this circuit does the rest.The output is clearly stepped but since the steps are at 16 times the sine frequency, you can use a simple RC low pass filter on the output to get a very acceptable sine wave result.Sorry, this is a scan of a scan so not altogether clear, I can send you the whole article if it's of interest...

That is great David. Brilliant! Thank you so much for this. As a life long sufferer of lazy-itis I will of course use the website Rick suggests. However, there remains an almost unparalleled joy when you finally understand the workings and methodology behind such a thing. Kind regards
Simon 

Simon I'm with you, no point in re-inventing the wheel.  However there are times (such as my conversion of the 8-bit generator below to 10 bits) when you need to do some maths  ( I think you're in UK so I can use the plural?) to get your values right.   Glad I could help.

David, I like this simple circuit. One caution, though: All eight flipflops must come out of reset at the same clock pulse for the operation to be correct, so you may need a D flipflop to make the reset (actually unreset coming out of reset) synchronous. This circuit could easily be implemented using the shift or rotate instructions in a microcontroller.

David you are correct on both counts, so it definitely is 'maths'.The scan you gave of another resistor DAC looks very interesting. Working out any different resistor values looks a particularly daunting task.  I do like the idea of using a shift-register though but merely as an interface to my currently working R2R network.  You have to love cheap mircos, they do make life easier sometimes!

Peter, I posted this earlier but it did not get through (Grrrr).  The shift register is reset on power on by C1 and R9 - a bit rude and crude but it works fine. The two reset inputs are for the two independent 4-bit SRs.  I was working at relatively low frequencies, it may be that a more positive reset would be needed if you were working at a faster rate to avoid mis-operation.I have the full article for this and a larger version (with 16-bit SR) if you're interested.  It's a handy technique.

Simon my apologies here, I have been leading you down the garden path a bit.  Just because your DAC has 5 bits / 32 steps does NOT mean you need to divide your sine wave into 32 steps time-wise.The 32 steps of your DAC are applied to the sine wave amplitude, not the time, so you can actually divide your time as you wish. But bear in mind that if you have the whole (that is, negative and positive) amplitude of the sine wave covered by 32 steps (that is, 16 each side) it does not make sense to have your steps too small, or too large.As it happens the 32 time steps works ok in my example, as the smallest amplitude steps are 1.  But you could just as well divide your sine wave into 30 or 36 or 40 time steps.  Make it an even number, better still one divisible by 4..  A lot will depend on whether you want an easy ratio between your sample frequency (ie how often you change your value) and your desired output frequency, it may be desirable to have that ratio as a multiple of 10 or 8 or 16 depending on your application.  Too few time steps and you'll lose resolution, too many and your DAC output will stay the same for many steps at the flatter parts of your sine wave.This applies even more in the shift-register generator, as it has a fixed ratio of 16 between the clock pulses and the output sine wave frequency.  That's why I redesigned it to have 10 stages (ratio of 20) so I could generate my clock frequency using BCD (Binary coded decimal) dividers, so I could have decimal numbers from thumbwheel switches to set my frequency.Sorry for the error (I think I'd missed a coffee when I wrote it) and hope this makes a bit more sense?

Hi David,
Thank you very much for that clarification - things make a little more sense in my mind now.  I certainly hadn't considered the relationship between frequency and sampling rate directly.  However, In my efforts I  stumbled toward the idea of simply dividing  the desired frequency by, in this case, 32.   For example, concert pitch A 440 Hz divided by 32 would give the necessary delay between each step.  Am I right?  When I tried this against a chromatic guitar tuner I got B.  Not far off, but not right. So, not sure what I've missed there.Incidentally, in my original post I said applied the numbers zero to 65336 to my 'improved' 8 bit DAC.  I meant 255.  This is not CD quality .  And the overall idea of this is to generate an accurate 12volt sinewave to run a small AC turntable motor.

Take in the Wikipedia article a little at a time. The phase accumulator generates a ramp, starting at zero and increasing a small amount (the phase increment) each clock until the accumulator is very close (less than the phase increment) to fullscale. Adding the phase increment again, makes the accumulator overflow to a small value (less than the phase increment), restarting the ramp.Try this binary arithmetic by hand, say with an eight-bit accumulator having values from 00000000 binary = zero to 11111111 binary = 256 = fullscale. Note that, when you add 1 to fullscale, the eight-bit result is zero, with a carry out to a ninth bit. Here we don't use the carry, so the eight-bit accumulator continually cycles.
Try phase_increment = 1, and you will see that it takes 256 additions to make the accumulator overflow and return to zero, so the output frequency is 1/256 times the clock frequency. Try phase_increment = 4, and you will see that it takes 64 additions to make the accumulator overflow and return to zero, so the output frequency is 4/256 = 1/64 times the clock frequency. For phase_increment = N, the output frequency is N/256 times the clock frequency.Once this makes sense to you, try phase_increment = 3. You will see that the output frequency is 3/256 = 1/85.3333333333333333... times the clock frequency, showing that the output frequency does not have to be the clock frequency divided by an integer. This is a great strength of a Numerically-Controlled Oscillator NCO, also called a Direct Digital Synthesizer: By adding more bits to the accumulator, we can make the frequency resolution as small as we want.