FAQ
TL;DR: 73 % of the 11 replies in this thread cite wiring or SCK speed as the root cause; "close the SLOW_CLK jumper and programming should start" [Elektroda, LordBlick, post #9130138] Updating USBasp firmware or enabling Slow-SCK solves most errors [Elektroda, saper_2, post #9136787]
Why it matters: Fixing these two points restores reliable flashing in under five minutes.
Quick Facts
• New AVR chips ship with a 1 MHz internal RC oscillator and CKDIV8 fuse set [*ATmega32 Datasheet*].
• USBasp Slow-SCK mode drops ISP clock to ≈8 kHz, safe for ≤1 MHz targets [*USBasp Docs*].
• Firmware ≥2011-05 adds software SCK scaling, eliminating the hardware jumper [*USBasp Docs*].
• Typical USBasp clone price: US $3–5, versus US $50 + for AVR-Dragon [Aliexpress 2023].
• Minimum programming current: 50 mA recommended, add 100 µF bulk cap at the breadboard [Elektroda, saper_2, post #9131736]
What does “warning: cannot set SCK period” mean in avrdude?
The warning appears when avrdude tries to slow the ISP clock but your USBasp has old firmware that cannot change SCK by software. You must either update the programmer’s firmware or manually short the Slow-SCK jumper (labelled J5 on many v2 boards) [Elektroda, manekinen, post #9136650]
How do I clear “target doesn’t answer / invalid device signature 0x000000”?
- Power the MCU at 5 V and add 100 nF + 100 µF decoupling.
- Connect MISO-MOSI-SCK-RST-VCC-GND correctly; swap MISO/MOSI if unsure [Elektroda, saper_2, post #9130565]
- Enable Slow-SCK. Successful reads should show 0x1E 95 02 for ATmega32 [Elektroda, saper_2, post #9126097]
Where is the Slow-SCK jumper on USBasp v2?
USBasp v2 boards have three jumpers: JP1=Target-Power, JP2=Firmware-Update, JP3=Slow-SCK. JP3 sits nearest the edge connector; short it with a shunt or twisted wire during programming of 1 MHz parts [Elektroda, saper_2, post #9135643]
Do I really need to update the USBasp firmware?
Yes if you want software-selectable SCK. Firmware 1.06 (2011-05) lets avrdude automatically set frequencies and removes the warning; update via a second ISP or the USBasp’s own bootloader if present [USBasp Docs].
Can a capacitor on RESET stop programming?
Yes. A 10 µF capacitor between RESET and GND can hold the line low and block the enable sequence. Removing it fixed several users’ issues [Elektroda, LordBlick, post #9132176]
What ISP clock rate is safe for a factory-fresh ATmega?
Keep SCK ≤ 1⁄4 of the CPU clock. With the default 1 MHz RC oscillator, set SCK to 250 kHz or use Slow-SCK at ~8 kHz for maximum safety [USBasp Docs].
Why does the -B10 option sometimes help?
The -B10 flag forces a 10 µs bit clock, roughly 100 kHz. It extends setup/hold times when the target runs slow but still relies on firmware support; old USBasp builds ignore the request and show the warning [Elektroda, bigben93, post #9122471]
How can I verify communication quickly?
Run: avrdude -c usbasp -p m32 (replace m32). A valid signature proves wiring and power are correct [Elektroda, saper_2, post #9126097]
What if everything looks right but it still fails?
Faulty chips do exist. One contributor traced the issue to a bad ATmega328P after swapping programmer and wiring [Elektroda, gregorr_, post #9286567] Test with another MCU before deeper debugging.
Is an external crystal required to flash the chip?
Not for new parts. If fusebits were changed to disable the internal RC oscillator, you must supply an external clock (4–16 MHz) to regain ISP access [Elektroda, saper_2, post #9131736]
Quick wiring check in three steps
- Power: 5 V to VCC/AVCC, GND to all GND pins.
- Data: RST → RST, MOSI → MOSI, MISO → MISO, SCK → SCK.
- Caps: 100 nF across VCC–GND, remove any RESET capacitor.
