Interior of the old Polsat digital decoder Echostar DSB-717

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Post #1
21816136 22 Jan 2026 10:05

Time to present the interior of another slightly older piece of equipment. This time it will be even more interesting, because I received two copies. I will see if anything from the inside can be useful to a hobbyist electronics technician, I will focus mainly on programmable circuits. Electronics is not at all an expensive occupation when recovering parts from electro-waste. Will we find out again this time? Let's find out!

We look at the back of the equipment and all doubts about its age are dispelled. This decoder doesn't even have an HDMI output. I don't know if it would still be able to receive anything, but looking at the prices it's possible to buy one for a dozen zlotys, and I don't even have a remote control....

The whole thing is built around one main PCB, with the switching power supply and the rest of the unit separately. The audio outputs (for the right and left channels) still have a tiny PCB, and there is also a separate display.

In the case of the display, we have a surprise, as there is neither a sliding register nor a dedicated controller such as the TM1650 or TM1637, but there is the well-known and well-loved ATTiny2313 microcontroller from Atmel at the time (now, after the acquisition, from Microchip). It appears that it is this MCU that does the multiplexing of the 7-segment display showing the channel codes.

The display has dots, but no colon - we won't make a clock easily. We also have an IR receiver, after all the remote has to work somehow. You could make it work at least with IRRemote from an Arduino or ESP.

As a curiosity, we have extra insulation on the bottom of the PCB on the high voltage side and the inverter in general, and on the low voltage side we have contacts from ground/casing

I had a look at the display. Strange, why so many wires when Attiny does multiplexing?
[img-1]

Both motherboards are quite similar:

On the underside we have only a few components, among others the decoupling capacitors from the main CPU:

Now let's further examine the rest of the PCB, starting with the power supply .
On the input we have rich filters to reduce EMI interference. Of course there is a fuse too. Then a bridge rectifier and a boost converter.

The inverter is based on the TOP245PN:

It can provide up to 30 W, depending on configuration and cooling capabilities.

This circuit already has a keying transistor integrated into it - below is a schematic of an example inverter:

Next we have more inverters - lower voltages are needed for the processor. In the background you can also see the AZ1117-ADJ, which is a linear voltage stabiliser with adjustable output.

L5970D - up to 1 A.

Example diagram:

The main processor is the STi5107KYA Omega from ST. On the PCB it appears with M28W320HS (32 Mb Flash) and K4H561638H (256 Mb SDRAM).

It's a shame that the Flash is in such an inaccessible DIY enclosure, otherwise something could be tampered with. I would have ripped the contents and analysed in Ghidra, and maybe I would have tried to upload something new.
Further separately we have the STV6414AD:

As far as I can see, this is simply an audio/video line switch, it is controlled via the I2C protocol.

Still here we have the RF tuner:

It is based on the STB6000, interestingly this chip operates in direct frequency conversion mode (without intermediate frequency - IF). It is controlled as usual via I2C:

And that's it for now - there's still some circuitry under the card reader, but the reader obscures the marking.

Summary
This time it's hard for me to write that the power supply will be useful, because the whole thing is as one module. It's equally hard to see playing with the main MCU, and there's not a lot of memory and capability there anyway.
Probably the biggest surprise, though, is this display module from Attina. After all, it's a representative of one of the most popular MCU families in DIY projects. It begs to be used. The only pity is that this display is without a colon. It is only useful for measurements. How about making one eight-digit display out of two?
That's it for now, perhaps in the next topic I will present some DIY based recovered parts. Or have you ever managed to recover interesting MCUs from electrical junk?

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p.kaczmarek2 p.kaczmarek2

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#2 21816268 22 Jan 2026 12:28

MAT_ ZAJ MAT_ ZAJ

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Post #2
21816268 22 Jan 2026 12:28

There are already some applications of the Attiny front panel with displays on the web, I recently acquired a scrap panel myself and also kept some components from it as well as the front panel
https://kaktusa.pl/panel-frontowy-dekodera-cyfrowego-polsatu-dsb-717/
https://www.elektroda.pl/rtvforum/topic3855371.html
https://www.elektroda.pl/rtvforum/topic3676125.html
https://grylewicz.pl/mini-plytka-testowa-avr-z-odzysku/
https://www.elektroda.pl/rtvforum/topic1761227.html
#3 21816351 22 Jan 2026 13:50

p.kaczmarek2 p.kaczmarek2

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Post #3
21816351 22 Jan 2026 13:50

Thanks for the info, I hadn't seen this, I haven't yet moved on to just running this board. It will definitely come in handy. Somehow it so happened that I had little to do with AVRs - I started my adventure with PICs because I wanted something less popular.

I am creating multiplatform open source firmware (Tasmota replacement), right now supporting BK7231T, BK7231N, XR809, BL602, W800, W600, LN882H and soon supporting RTL and W701:
https://github.com/openshwprojects/OpenBK7231T
If you like my work, support me at: https://paypal.me/openshwprojects

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#4 21816356 22 Jan 2026 13:52

sylweksylwina sylweksylwina

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Post #4
21816356 22 Jan 2026 13:52

I got the thermometer from the display from the DSB-616
The dot can be made up. You can drill the display from the bottom and insert the Led
#5 21816377 22 Jan 2026 14:07

p.kaczmarek2 p.kaczmarek2

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Post #5
21816377 22 Jan 2026 14:07

Those Attins were a surprise to me though. I see that at least some of the DSB series were built this way?

As a rule I rather see chips like TM1650, FD650, HD2015, etc in newer DVB receivers.
Running HD2015 display/button controller after reverse engineering, comparison with TM1637itd

I am creating multiplatform open source firmware (Tasmota replacement), right now supporting BK7231T, BK7231N, XR809, BL602, W800, W600, LN882H and soon supporting RTL and W701:
https://github.com/openshwprojects/OpenBK7231T
If you like my work, support me at: https://paypal.me/openshwprojects

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#6 21816386 22 Jan 2026 14:12

sylweksylwina sylweksylwina

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Post #6
21816386 22 Jan 2026 14:12

the 717 was the successor to the 616. The 616 had a small board with just the display and attiny. In the 717 the display is already built into the whole front panel.

The function of both displays was the same, and the whole STB was similar, as far as I remember, both models were based on ST Omega CPUs, only the older one was in a bigger BGA case.
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#7 21817311 23 Jan 2026 13:34

maciej_333 maciej_333

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Post #7
21817311 23 Jan 2026 13:34

p.kaczmarek2 wrote:
This time it's hard for me to write that the power supply will be useful, because the whole thing is as one module. It's equally hard to see playing with the main MCU, and there's not a lot of memory and capability there anyway.
Probably the biggest surprise, though, is this display module from Attina. After all, it's a representative of one of the most popular MCU families in DIY projects. It begs to be used. The only pity is that this display is without a colon. It is only useful for measurements. How about making one eight-digit display out of two?
That's it for now, perhaps in the next topic I will present some DIY based recovered parts. Or have you ever managed to recover interesting MCUs from electro-waste?

I was most acutely interested here in the head unit on the STB6000. The datasheet for this is a mere two pages, so there are no specifics. However, after searching for a while I found some code: stb6000.h and stb6000.c . You could try to do some SDR on this. From this code it looks like with it (stb6000_set_params function) and a logic state analyser it would probably be possible to run it on an STM32.

Would you be willing to perhaps send me one of these tuners at shipping cost?
#8 21817812 23 Jan 2026 22:58

RomanWorkshop RomanWorkshop

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Post #8
21817812 23 Jan 2026 22:58

As for the LED display module with ATtiny2313 microcontroller: Link .

The I2C address of the LED display module is 0x38 (7-bit), baud rate 100 kHz. The I2C frame sent contains 7 bytes - the first three are 0x38, 0x00, 0x07. The next four bytes are the digits displayed on the LED, starting from the left (byte #7 controls the far right digit).

The bytes and corresponding digits sent are:
0 - 0x3F, 1 - 0x09, 2 - 0x6E, 3 - 0x6D, 4 - 0x59, 5 - 0x75, 6 - 0x77, 7 - 0x29, 8 - 0x7F, 9 - 0x7D, digit blanked out - 0x00

Bits and corresponding segments of the display:
%00000001 $01 - segment "c", %00000010 $02 - segment "e", %00000100 $04 - segment "d", %00001000 $08 - segment "b", %00010000 $10 - segment "f", %00100000 $20 - segment "a", %01000000 $40 - segment "g", %10000000 $80 - none, %00000000 $00 - none

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#9 21818814 25 Jan 2026 00:48

p.kaczmarek2 p.kaczmarek2

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Post #9
21818814 25 Jan 2026 00:48

@maciej_333 I'd be happy to give you both boards, but I need to see if I still have them. I took the photos for the theme a while back, and I regularly have to get rid of some of the electronics because I wouldn't fit it all in. I definitely have the displays, I don't know what about the rest.

On the other hand, I'll keep this in mind already, if I come across any more tuners, I'll check what's in there and if anything I'll intercept the communication and put it away - I'll ask you on PW.

@RomanWorkshop thanks for the useful info! I'll try it out, especially as I have two copies of it.

The only thing that puzzles me is, if there's I2C in there, why so many wires to that PCB? Power, GND, SCL, SDA, and then there's IR, after all, that's a lot less than I see there....

Added after 1 [hours] 26 [minutes]:

PS: This is the diagram I found for the STB6000:

I am creating multiplatform open source firmware (Tasmota replacement), right now supporting BK7231T, BK7231N, XR809, BL602, W800, W600, LN882H and soon supporting RTL and W701:
https://github.com/openshwprojects/OpenBK7231T
If you like my work, support me at: https://paypal.me/openshwprojects

Helpful post? Buy me a coffee.
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#10 21819293 25 Jan 2026 14:53

maciej_333 maciej_333

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Post #10
21819293 25 Jan 2026 14:53

p.kaczmarek2 wrote:
This is the diagram I found as to the STB6000

I have also seen this. The STB6000 is with a "zero IF" output. As if the signals from it were fed to low-pass (analogue) filters it would be possible to sample it with the STM32. I already have an AV2012 chip running like this (also from a DVB-S tuner), although everything is designed for it.

p.kaczmarek2 wrote:
While I'll already have this in mind, if I come across any more tuners, I'll check what's sitting there and if anything I'll intercept the communication and put it back - I'll ask you on PW.

Right. It's the heads that would interest me - especially how they are removable modules. It's just that when there's no datasheet you mostly need the whole tuner to run.

Some residual information is given about the STi5107KYA (main CPU):

Link
They state that there is an "ST20 32-bit VL-RISC CPU" core. You can see a connector on the board, which is probably a JTAG, but I don't particularly see any chance of working it out. The UART is nowhere to be seen either. Something about the STi5107KYA is on a reliable Chinese site: Link . Too bad I ran out of points there.

p.kaczmarek2 wrote:
The only thing that puzzles me is if there is I2C there, why so many wires to that PCB?

It is not by chance that the keys are not supported by the Attiny?
#11 21819344 25 Jan 2026 15:46

MAT_ ZAJ MAT_ ZAJ

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Post #11
21819344 25 Jan 2026 15:46

maciej_333 wrote:

p.kaczmarek2 wrote:
The only thing that puzzles me is if there is I2C, why so many wires to this PCB?

It is not by chance that the keys are not supported by Attiny?

That's right, the keys are routed out to just this ribbon of wires, as are the IR receiver and the two-colour LED. These signals go back to the tuner motherboard.
I am attaching a description from one of the earlier links.
#12 21820453 26 Jan 2026 17:45

żarówka rtęciowa żarówka rtęciowa

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Post #12
21820453 26 Jan 2026 17:45

Hello

I had to deal with such a scrap and I must admit that it is difficult to solder THT elements e.g.: transformers from double-sided PCBs. Older tuners from the 90s were better in this respect because the PCB was single-sided and there were a lot of through-hole components.
#13 21822355 28 Jan 2026 16:50

SylwekK SylwekK

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Post #13
21822355 28 Jan 2026 16:50

Personally, I am very fond of such modules and I have already presented one such recovery here in the past
https://www.elektroda.pl/rtvforum/topic3676125.html

#14 21823220 29 Jan 2026 13:02

_ACeK_ _ACeK_

Level 14

Post #14

21823220 29 Jan 2026 13:02

From the link from the information posted by RomanWorkshop I did reverse engineering hex code :idea:

;*************************************************************
;                   Echostar_dsb-717                         *
;   avr-objdump -D -m avr:4 flash_tiny.hex >flash_tiny.txt   *
;*************************************************************

.include  "tn2313.inc"

.def    acc    =  r16
.equ    sda    =  5
.equ    scl    =  7

.org 0x0000
;-------------------------------------------------------------
    rjmp   Reset                             ; 0x1f6   0: c0fa
    reti                                     ;         2: 9518
    reti                                     ;         4: 9518
    reti                                     ;         6: 9518
    reti                                     ;         8: 9185
    reti                                     ;         a: 9518
    reti                                     ;         c: 9518
    reti                                     ;         e: 9518
    reti                                     ;        10: 9518
    reti                                     ;        12: 9518
    reti                                     ;        14: 9518
    reti                                     ;        16: 9518
    reti                                     ;        18: 9518
    rjmp   OC0A                              ; 0x1c0  1a: c0d2
    reti                                     ;        1c: 9518
    rjmp   USI_START                         ; 0x40   1e: c010
    reti                                     ;        20: 9518
    reti                                     ;        22: 9518
    reti                                     ;        24: 9518
;-------------------------------------------------------------

Data_Data:
.db 0x08, 0x65                               ;        26: 6508
.db 0x00, 0x00                               ;        28: 0000
.db 0x05, 0x60                               ;        2a: 6005
.db 0x54, 0x02                               ;        2c: 0254
;-------------------------------------------------------------

Init_I2C:
    cbi    PORTB, scl                        ; 24     2e: 98c7
    cbi    PORTB, sda                        ; 24     30: 98c5
    cbi    DDRB, scl                         ; 23     32: 98bf
    cbi    DDRB, sda                         ; 23     34: 98bd
    ldi    acc, 0b1010_1000                  ; 168    36: ea08
    out    USICR, acc                        ; 13     38: b90d
    ldi    acc, 0b1111_0000                  ; 240    3a: ef00
    out    USISR, acc                        ; 14     3c: b90e
    ret                                      ;        3e: 9508
;-------------------------------------------------------------

;*************************************************************
;*   Read I2c                                                *
;*************************************************************
USI_START:
    st     -Y, XL                            ;        40: 93aa
    st     -Y, r25                           ;        42: 939a
    st     -Y, r24                           ;        44: 938a
    st     -Y, ZL                            ;        46: 93ea
    st     -Y, r18                           ;        48: 932a
    st     -Y, r17                           ;        4a: 931a
    st     -Y, acc                           ;        4c: 930a
    in     r18, SREG                         ; 63     4e: b72f
    ldi    acc, 0b1110_0000                  ; 224    50: ee00
    out    USISR, acc                        ; 14     52: b90e
    sei                                      ;        54: 9478
Wait_00:
    in     acc, USISR                        ; 14     56: b10e
    andi   acc, 0b0000_1111                  ; 15     58: 700f
    cpi    acc, 0b0000_1101                  ; 13     5a: 300d
    brcs   Wait_00                           ; 0x56   5c: f3e0
    cli                                      ;        5e: 94f8
Wait_01:
    sbis   USISR, USIOIF                     ; 14     60: 9b76
    rjmp   Wait_01                           ; 0x60   62: cffe
    in     acc, USIDR                        ; 15     64: b10f
    cpi    acc, 0b0111_0000                  ; 112    66: 3700
    brne   Set_USISR                         ; 0xc6   68: f571

    ldi    acc, 0x00                         ; 0      6a: e000
    out    USIDR, acc                        ; 15     6c: b90f
    sbi    DDRB, sda                         ; 23     6e: 9abd
    ldi    acc, 0b0100_1101                  ; 77     70: e40d
    out    USISR, acc                        ; 14     72: b90e
Wait_02:
    sbis   USISR, USIOIF                     ; 14     74: 9b76
    rjmp   Wait_02                           ; 0x74   76: cffe
    cbi    DDRB, sda                         ; 23     78: 98bd
    ldi    acc, 0b1110_0000                  ; 224    7a: ee00
    out    USISR, acc                        ; 14     7c: b90e
    ldi    r24, 0x00                         ; 0      7e: e080
    ldi    r25, 0x00                         ; 0      80: e090

Read_Loop:
    sei                                      ;        82: 9478
Wait_03:
    in     acc, USISR                        ; 14     84: b10e
    andi   acc, 0x0F                         ; 15     86: 700f
    cpi    acc, 0x0D                         ; 13     88: 300d
    brcs   Wait_03                           ; 0x84   8a: f3e0
    cli                                      ;        8c: 94f8
Wait_04:
    sbis   USISR, USIOIF                     ; 14     8e: 9b76
    rjmp   Wait_04                           ; 0x8e   90: cffe
    ldi    ZL, 0x65                          ; 101    92: e6e5
    in     acc, USIDR                        ; 15     94: b10f
    std    Z+7, acc                          ; 0x07   96: 8307
    ldi    acc, 0x00                         ; 0      98: e000
    out    USIDR, acc                        ; 15     9a: b90f
    sbi    DDRB, sda                         ; 23     9c: 9abd
    ldi    acc, 0x4E                         ; 78     9e: e40e
    out    USISR, acc                        ; 14     a0: b90e
Wait_05:
    sbis   USISR, USIOIF                     ; 14     a2: 9b76
    rjmp   Wait_05                           ; 0xa2   a4: cffe
    cbi    DDRB, sda                         ; 23     a6: 98bd
    ldd    r17, Z+7                          ; 0x07   a8: 8117
    ldi    r26, 0x65                         ; 101    aa: e6a5
    inc    r26                               ;        ac: 95a3
    add    XL, r24                           ;        ae: 0fa8
    st     X, r17                            ;        b0: 931c
    ldi    acc, 0b1110_0000                  ; 224    b2: ee00
    out    USISR, acc                        ; 14     b4: b90e
    ldi    acc, 0x01                         ; 1      b6: e001
    st     Z, acc                            ;        b8: 8300
    adiw   r24, 0x01                         ; 1      ba: 9601
    cpi    r24, 0x06                         ; 6      bc: 3086
    ldi    acc, 0x00                         ; 0      be: e000
    cpc    r25, acc                          ;        c0: 0790
    brge   Skip_Set_USISR                    ; 0xca   c2: f41c
    rjmp   Read_Loop                         ; 0x82   c4: cfde

Set_USISR:
    ldi    acc, 0b1111_0000                  ; 240    c6: ef00
    out    USISR, acc                        ; 14     c8: b90e

Skip_Set_USISR:
    out    SREG, r18                         ; 63     ca: bf2f
    ld     acc, Y+                           ;        cc: 9109
    ld     r17, Y+                           ;        ce: 9119
    ld     r18, Y+                           ;        d0: 9129
    ld     ZL, Y+                            ;        d2: 91e9
    ld     r24, Y+                           ;        d4: 9189
    ld     r25, Y+                           ;        d6: 9199
    ld     XL, Y+                            ;        d8: 91a9
    reti                                     ;        da: 9518
;*************************************************************

WATCHDOG:
    cli                                      ;        dc: 94f8
    wdr                                      ;        de: 95a8
    in     acc, WDTCR                        ; 33     e0: b501
    ori    acc, 0b0001_1000                  ; 24     e2: 6108
    out    WDTCR, acc                        ; 33     e4: bd01
    ldi    acc, 0b0010_1001                  ; 41     e6: e209
    out    WDTCR, acc                        ; 33     e8: bd01
    sei                                      ;        ea: 9478

Return_from_Convertor:
    ret                                      ;        ec: 9508
;-------------------------------------------------------------
Convertor:
    mov    r17, acc                          ;        ee: 2f10
    bst    r17, 0                            ;        f0: fb10
    ldi    r17, 0x00                         ; 0      f2: e010
    bld    r17, 2                            ;        f4: f912
    mov    r18, acc                          ;        f6: 2f20
    add    r18, r18                          ;        f8: 0f22
    add    r18, r18                          ;        fa: 0f22
    add    r18, r18                          ;        fc: 0f22
    or     r18, r17                          ;        fe: 2b21
    andi   r18, 0b0001_0111                  ; 23    100: 7127
    mov    r17, acc                          ;       102: 2f10
    add    r17, r17                          ;       104: 0f11
    andi   r17, 0b0000_1000                  ; 8     106: 7018
    or     r17, r18                          ;       108: 2b12
    mov    r18, acc                          ;       10a: 2f20
    lsr    r18                               ;       10c: 9526
    lsr    r18                               ;       10e: 9526
    andi   r18, 0b0000_0010                  ; 2     110: 7022
    or     r18, r17                          ;       112: 2b21
    mov    r17, acc                          ;       114: 2f10
    add    r17, r17                          ;       116: 0f11
    andi   r17, 0b0010_0000                  ; 32    118: 7210
    or     r17, r18                          ;       11a: 2b12
    mov    r18, acc                          ;       11c: 2f20
    bst    r18, 5                            ;       11e: fb25
    ldi    r18, 0x00                         ; 0     120: e020
    bld    r18, 0                            ;       122: f920
    or     r18, r17                          ;       124: 2b21
    andi   acc, 0b0100_0000                  ; 64    126: 7400
    or     acc, r18                          ;       128: 2b02
    com    acc                               ;       12a: 9500
    rjmp   Return_from_Convertor             ; 0xec  12c: cfdf
;-------------------------------------------------------------
Set_Hardware:
    in     acc, DDRB                         ; 23    12e: b307
    ori    acc, 0b0000_1111                  ; 15    130: 600f
    out    DDRB, acc                         ; 23    132: bb07
    in     acc, PORTB                        ; 24    134: b308
    andi   acc, 0b1111_0000                  ; 240   136: 7f00
    out    PORTB, acc                        ; 24    138: bb08
    in     acc, DDRD                         ; 17    13a: b301
    ori    acc, 0b0111_1111                  ; 127   13c: 670f
    out    DDRD, acc                         ; 17    13e: bb01
    in     acc, PORTD                        ; 18    140: b302
    andi   acc, 0b1000_0000                  ; 128   142: 7800
    out    PORTD, acc                        ; 18    144: bb02

    ldi    acc, 0x03                         ; 3     146: e003
    ldi    ZL, 0x60                          ; 96    148: e6e0
    st     Z, acc                            ;       14a: 8300
    in     acc, TIMSK                        ; 57    14c: b709
    andi   acc, 0b1111_1100                  ; 252   14e: 7f0c
    out    TIMSK, acc                        ; 57    150: bf09
    ldi    acc, 0x00                         ; 0     152: e000
    out    TCNT0, acc                        ; 50    154: bf02
    ldi    acc, 0x20                         ; 32    156: e200
    out    OCR0A, acc                        ; 54    158: bf06
    in     acc, TCCR0B                       ; 51    15a: b703
    ori    acc, 0b0000_0100                  ; 4     15c: 6004
    out    TCCR0B, acc                       ; 51    15e: bf03
    in     acc, TIMSK                        ; 57    160: b709
    ori    acc, 0b0000_0001                  ; 1     162: 6001
    out    TIMSK, acc                        ; 57    164: bf09

    ldi    acc, 0x38                         ; 56    166: e308
    rcall  Init_I2C                          ; 0x2e  168: df62
    ldi    acc, 0xF0                         ; 240   16a: ef00
    rcall  Convertor                         ; 0xee  16c: dfc0
    ldi    acc, 0x00                         ; 0     16e: e000
    ldi    ZL, 0x65                          ; 101   170: e6e5
    st     Z, acc                            ;       172: 8300
    in     r17, MCUSR                        ; 52    174: b714
    sbrc   r17, 3                            ;       176: fd13
    rjmp   Skip_Set                          ; 0x186 178: c006
    ldi    acc, 0xFF                         ; 255   17a: ef0f
    ldi    ZL, 0x6D                          ; 109   17c: e6ed
    std    Z+3, acc                          ; 0x03  17e: 8303
    std    Z+2, acc                          ; 0x02  180: 8302
    std    Z+1, acc                          ; 0x01  182: 8301
    st     Z, acc                            ;       184: 8300
Skip_Set:
    ldi    acc, 0x00                         ; 0     186: e000
    out    MCUSR, acc                        ; 52    188: bf04
    rcall  WATCHDOG                          ; 0xdc  18a: dfa8
;-------------------------------------------------------------
Main:
Wait_Hear:
    wdr                                      ;       18c: 95a8
    ldi    ZL, 0x65                          ; 101   18e: e6e5
    ld     acc, Z                            ;       190: 8100
    and    acc, acc                          ;       192: 2300
    breq   Wait_Hear                         ; 0x18c 194: f3d9
    ldi    acc, 0x00                         ; 0     196: e000
    st     Z, acc                            ;       198: 8300
    cli                                      ;       19a: 94f8
    ldi    r24, 0x00                         ; 0     19c: e080
    ldi    r25, 0x00                         ; 0     19e: e090
Loop:
    mov    acc, r24                          ;       1a0: 2f08
    subi   acc, 0xFE                         ; 254   1a2: 5f0e
    mov    ZL, acc                           ;       1a4: 2fe0
    subi   ZL, 0x9A                          ; 154   1a6: 59ea
    ld     acc, Z                            ;       1a8: 8100
    rcall  Convertor                         ; 0xee  1aa: dfa1
    ldi    ZL, 0x6D                          ; 109   1ac: e6ed
    add    ZL, r24                           ;       1ae: 0fe8
    st     Z, acc                            ;       1b0: 8300
    adiw   r24, 0x01                         ; 1     1b2: 9601
    cpi    r24, 0x04                         ; 4     1b4: 3084
    ldi    acc, 0x00                         ; 0     1b6: e000
    cpc    r25, acc                          ;       1b8: 0790
    brlt   Loop                              ; 0x1a0 1ba: f394
    sei                                      ;       1bc: 9478
    rjmp   Main                              ; 0x18c 1be: cfe6

;*************************************************************
;*                7 Seg Led Diplay Interrupt                 *
;*************************************************************
OC0A:
    st     -Y, ZL                            ;       1c0: 93ea
    st     -Y, r17                           ;       1c2: 931a
    st     -Y, acc                           ;       1c4: 930a
    in     r17, SREG                         ; 63    1c6: b71f

    ldi    acc, 0x00                         ; 0     1c8: e000
    out    TCNT0, acc                        ; 50    1ca: bf02
    out    PORTB, acc                        ; 24    1cc: bb08
    ldi    ZL, 0x60                          ; 96    1ce: e6e0
    ld     ZL, Z                             ;       1d0: 81e0
    subi   ZL, 0x93                          ; 147   1d2: 59e3
    ld     acc, Z                            ;       1d4: 8100
    out    PORTD, acc                        ; 18    1d6: bb02
    ldi    ZL, 0x60                          ; 96    1d8: e6e0
    ld     ZL, Z                             ;       1da: 81e0
    subi   ZL, 0xA0                          ; 160   1dc: 5ae0
    ldd    acc, Z+1                          ; 0x01  1de: 8101
    out    PORTB, acc                        ; 24    1e0: bb08
    ldi    ZL, 0x60                          ; 96    1e2: e6e0
    ld     acc, Z                            ;       1e4: 8100
    inc    acc                               ;       1e6: 9503
    andi   acc, 0b0000_0011                  ; 3     1e8: 7003
    st     Z, acc                            ;       1ea: 8300

    out    SREG, r17                         ; 63    1ec: bf1f
    ld     acc, Y+                           ;       1ee: 9109
    ld     r17, Y+                           ;       1f0: 9119
    ld     ZL, Y+                            ;       1f2: 91e9
    reti                                     ;       1f4: 9518
;*************************************************************

;-------------------------------------------------------------
Reset:
    ldi    acc, 0xB0                         ; 176   1f6: eb00
    out    SPL, acc                          ; 61    1f8: bf0d
    ldi    YL, 0x91                          ; 145   1fa: e9c1
    rcall  Down_020a                         ; 0x20a 1fc: d006
    and    acc, acc                          ;       1fe: 2300
    breq   Skip_Read_Data                    ; 0x204 200: f009
    rcall  Read_Data                         ; 0x222 202: d00f
Skip_Read_Data:
    rcall  Set_Hardware                      ; 0x12e 204: df94
    rcall  Go_to_Sleep                       ; 0x24e 206: d023
    rjmp   Go_to_Sleep                       ; 0x24e 208: c022

Down_020a:
    ldi    acc, 0x01                         ; 1     20a: e001
    ret                                      ;       20c: 9508

Clear_Ram:
    ldi    r17, 0x00                         ; 0     20e: e010
    st     X+, r17                           ;       210: 931d
    dec    acc                               ;       212: 950a
    brne   Clear_Ram                         ; 0x20e 214: f7e1

Return_Set_Ram_Data:
    ret                                      ;       216: 9508

Set_Ram_Data:
    lpm    r17, Z+                           ;       218: 9115
    st     X+, r17                           ;       21a: 931d
    dec    acc                               ;       21c: 950a
    brne   Set_Ram_Data                      ; 0x218 21e: f7e1
    rjmp   Return_Set_Ram_Data               ; 0x216 220: cffa

Read_Data:
    ldi    r24, low (Data_Data << 1)         ; 38    222: e286
    ldi    r25, high(Data_Data << 1)         ; 0     224: e090
Loop1:
    movw   ZL, r24                           ;       226: 01fc
    lpm    acc, Z+                           ;       228: 9105
    lpm    XL, Z                             ;       22a: 91a4
    movw   ZL, r24                           ;       22c: 01fc
    adiw   ZL, 0x02                          ; 2     22e: 9632
    lpm    r18, Z+                           ;       230: 9125
    lpm    r19, Z                            ;       232: 9134
    mov    r17, r18                          ;       234: 2f12
    or     r17, r19                          ;       236: 2b13
    breq   Go_Clear_Ram                      ; 0x240 238: f019
    movw   ZL, r18                           ;       23a: 01f9
    rcall  Set_Ram_Data                      ; 0x218 23c: dfed
    rjmp   Skip_Clear_Ram                    ; 0x242 23e: c001
Go_Clear_Ram:
    rcall  Clear_Ram                         ; 0x20e 240: dfe6

Skip_Clear_Ram:
    adiw   r24, 0x04                         ; 4     242: 9604
    ldi    r17, 0x00                         ; 0     244: e010
    cpi    r24, 0x2E                         ; 46    246: 328e
    cpc    r25, r17                          ;       248: 0791
    brcs   Loop1                             ; 0x226 24a: f368
    rjmp   Return_Set_Ram_Data               ; 0x216 24c: cfe4

Go_to_Sleep:
    nop                                      ;       24e: 0000

Go_Sleep:
    sleep                                    ;       250: 9588
    rjmp    Go_Sleep                         ; 0x250 252: cffe

Ram_Data:
.db 0x00, 0x08                               ;       254: 0800
.db 0x04, 0x02                               ;       256: 0204
.db 0x01, 0xff                               ;       258: ff01
;-------------------------------------------------------------
.exit

Hex code here

:020000020000FC
:10000000FAC018951895189518951895189518957B
:1000100018951895189518951895D2C0189510C070
:100020001895189518950865000005605402C79842
:10003000C598BF98BD9808EA0DB900EF0EB90895AC
:10004000AA939A938A93EA932A931A930A932FB7BF
:1000500000EE0EB978940EB10F700D30E0F3F89405
:10006000769BFECF0FB1003771F500E00FB9BD9A56
:100070000DE40EB9769BFECFBD9800EE0EB980E080
:1000800090E078940EB10F700D30E0F3F894769B09
:10009000FECFE5E60FB1078300E00FB9BD9A0EE48D
:1000A0000EB9769BFECFBD981781A5E6A395A80F44
:1000B0001C9300EE0EB901E000830196863000E04B
:1000C00090071CF4DECF00EF0EB92FBF09911991F4
:1000D0002991E99189919991A9911895F894A895F8
:1000E00001B5086101BD09E201BD78940895102FA2
:1000F00010FB10E012F9202F220F220F220F212BCC
:100100002771102F110F1870122B202F269526956E
:100110002270212B102F110F1072122B202F25FB74
:1001200020E020F9212B0074022B0095DFCF07B3CC
:100130000F6007BB08B3007F08BB01B30F6701BBAB
:1001400002B3007802BB03E0E0E6008309B70C7F4E
:1001500009BF00E002BF00E206BF03B7046003BFAF
:1001600009B7016009BF08E362DF00EFC0DF00E00C
:10017000E5E6008314B713FD06C00FEFEDE6038339
:1001800002830183008300E004BFA8DFA895E5E6B1
:1001900000810023D9F300E00083F89480E090E030
:1001A000082F0E5FE02FEA590081A1DFEDE6E80F8E
:1001B00000830196843000E0900794F37894E6CFB2
:1001C000EA931A930A931FB700E002BF08BBE0E668
:1001D000E081E359008102BBE0E6E081E05A018161
:1001E00008BBE0E600810395037000831FBF0991FF
:1001F0001991E991189500EB0DBFC1E906D00023D4
:1002000009F00FD094DF23D022C001E0089510E060
:100210001D930A95E1F7089515911D930A95E1F74D
:10022000FACF86E290E0FC010591A491FC013296A0
:1002300025913491122F132B19F0F901EDDF01C034
:10024000E6DF049610E08E32910768F3E4CF0000F9
:0A0250008895FECF0008040201FFAC
:00000001FF

Diagram of the module Led :wink:

Circuit diagram of a 7-segment LED display controlled by an ATtiny2313 microcontroller.

The code is a bit wonky, I wonder what it was originally written in 🤔

#15 21828692 04 Feb 2026 10:41

bsw bsw

Level 21

» | Helpful post? (0)

Post #15
21828692 04 Feb 2026 10:41

p.kaczmarek2 wrote:
Display has dots, but no colon - we won't make a clock easily.
[img-1]

If you are stubborn, one of the displays can be soldered and rotated 180 degrees.
You will only need 4 crossovers - the rest can be handled by software and you have a colon !
In addition to the clock you can also make a thermometer - the second dot is the degree sign in front of the tasteful little upper c

Helpful post? Buy me a coffee.
#16 21837113 12 Feb 2026 21:56

jackfinch jackfinch

Level 19

» | Helpful post? (0)

Post #16
21837113 12 Feb 2026 21:56

p.kaczmarek2 wrote:
It's a pity that the Flash is in such an inaccessible DIY case, otherwise something could be tampered with. I would rip the contents and analyse them in Ghidra, and maybe try to upload something new.

There is a j5 connector and it was a jtag connector as far as I remember, but in those days as far as I remember there was no software for those STi5107 processors to read what is in the flash, and I guess the pins were not brought out from the processor to the jtag to secure the firmware. But the batches were probably available on the internet, because someone hot soldered them and ripped them off.
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Install Elektroda application

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Interior of the old Polsat digital decoder Echostar DSB-717

FAQ

TL;DR: Inside the DSB‑717: TOP245PN PSU up to 30 W and STi5107KYA with 32 Mb Flash/256 Mb SDRAM. “It is this MCU that does the multiplexing.” [Elektroda, p.kaczmarek2, post #21816136]

Why it matters: This FAQ helps hobbyists reuse the DSB‑717’s front panel, power, and RF parts for quick, low‑cost projects.

Quick Facts

Display module uses ATtiny2313 over I2C at 100 kHz, address 0x38; 7‑byte frames control four digits. [Elektroda, RomanWorkshop, post #21817812]
Switch‑mode supply based on TOP245PN; configuration supports up to ~30 W output. [Elektroda, p.kaczmarek2, post #21816136]
Local regulators include L5970D (up to 1 A) and AZ1117‑ADJ for low‑noise rails. [Elektroda, p.kaczmarek2, post #21816136]
Main SoC: STi5107KYA with M28W320HS 32 Mb Flash and K4H561638H 256 Mb SDRAM. [Elektroda, p.kaczmarek2, post #21816136]
Typical resale/scrap cost is only “a dozen zlotys,” making parts recovery attractive. [Elektroda, p.kaczmarek2, post #21816136]

Whats actually inside the Echostar DSB‑717?

One main PCB holds the STi5107KYA SoC, 32 Mb Flash, 256 Mb SDRAM, STV6414A A/V switch, STB6000 tuner, and a TOP245PN‑based PSU. The front panel integrates a 4‑digit 7‑segment LED driven by an ATtiny2313. Audio L/R sits on a tiny daughterboard, and the IR receiver is on the front panel. [Elektroda, p.kaczmarek2, post #21816136]

Does the DSB‑717 have HDMI output?

No. The rear panel lacks HDMI, confirming the platform’s age and analog‑centric design. Expect SCART and baseband A/V instead. [Elektroda, p.kaczmarek2, post #21816136]

Which microcontroller drives the LED display and how is it controlled?

An ATtiny2313 handles display multiplexing. It exposes an I2C slave at 7‑bit address 0x38, using 100 kHz. You send a 7‑byte frame: 0x38, 0x00, 0x07, then four bytes for digits left‑to‑right. Segment codes for 0–9 and blank are provided. [Elektroda, RomanWorkshop, post #21817812]

Why are there so many wires to the front panel if its I2C?

Besides VCC, GND, SDA, and SCL, the ribbon carries key buttons, the IR receiver, and a bi‑color LED back to the mainboard. That’s why the harness is wide. [Elektroda, MAT_ZAJ, post #21819344]

Can I add a colon to make a simple clock from the display?

The stock display lacks a colon. A community tip is to drill from beneath and add an LED to form a dot/colon indicator. “The dot can be made up.” Proceed carefully to avoid segment damage. [Elektroda, sylweksylwina, post #21816356]

How do I drive the ATtiny2313 LED module over I2C (3 steps)?

Wire VCC, GND, SDA, and SCL; set 100 kHz I2C.
Send: 0x38, 0x00, 0x07, D3, D2, D1, D0 (left to right digits).
Use provided byte map: e.g., 0→0x3F, 1→0x09, … 9→0x7D; 0x00 blanks a digit. [Elektroda, RomanWorkshop, post #21817812]

What power devices and ratings should I know before reuse?

Primary SMPS uses TOP245PN; designs around it support roughly 30 W. Downstream, an L5970D buck provides up to 1 A, and AZ1117‑ADJ supplies regulated rails. Keep thermal limits in mind during reuse. [Elektroda, p.kaczmarek2, post #21816136]

What tuner IC is used and can it support DIY SDR experiments?

The STB6000 uses zero‑IF with I2C control. A contributor notes it could feed low‑pass filters and be sampled by an STM32, with a logic analyzer aiding bring‑up. “You could try to do some SDR on this.” [Elektroda, maciej_333, post #21817311]

What CPU and memory does the board carry?

An STi5107KYA SoC pairs with M28W320HS 32 Mb Flash and K4H561638H 256 Mb SDRAM. These capacities suit legacy DVB decoding but limit modern repurposing. [Elektroda, p.kaczmarek2, post #21816136]

Is the onboard Flash easy to dump or modify for custom firmware?

No. The Flash package and layout hinder DIY access. The author notes he would have dumped it for Ghidra if it were accessible. Consider external programming only if you rework the package. [Elektroda, p.kaczmarek2, post #21816136]

Any pitfalls when salvaging parts from this unit?

Yes. Desoldering THT parts like transformers from double‑sided PCBs is difficult compared with older single‑sided tuners from the 1990s. Plan for preheating and ample flux. [Elektroda, ar14wka rt19ciowa, post #21820453]

Do other models share this ATtiny front panel approach?

Yes. The DSB‑616 used a small board with the display and ATtiny. The DSB‑717 integrates the display into the full front panel, but functions are similar. [Elektroda, sylweksylwina, post #21816386]

Why is this display less ideal for a full clock project?

It has dots but no built‑in colon, limiting conventional time separators. It’s better for numeric indicators or measurements unless you add LEDs. [Elektroda, p.kaczmarek2, post #21816136]

Is there a segment bit map to customize characters?

Yes. The ATtiny expects bytes where bits map to segments: a, b, c, d, e, f, g pattern and a blank value. Provided digit codes include 0x3F for 0 and 0x7D for 9. [Elektroda, RomanWorkshop, post #21817812]

Interior of the old Polsat digital decoder Echostar DSB-717

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