How Does a Single Clock Signal Synchronize Sequential Digital Devices in a Chain?

Hi guys;I have read about clock and didn't understand that much how clock is applied on digital devices; I mean lets assume I have two digital devices connected sequentially to each other like that "first device 1" connected sequentially "second device 2" and assume that every device need one cycle to finish its work/to work properly, so I didn't understand why the second device need two cycles to be work properly? where does the first clock gone? the first clock is entered by the first device and will be continue to the second device .. so I'm confusing why the second device works in the second cycle? not in the first clock or the third clock? may please please anyone illustrate about how clock works on digital devices and how should I visualize it? (( the digital devices that I'm taking about is single clock ))for example to illustrate more, the first clock arrives then he will enter to the first digital device so the digital device will work but also that first clock will continue to the second device ..so I didn't understand why the second device work in the second clock and not in the first clock?!
what happened if the digital device absorbed many clocks although he works/finish his work in one clock cycle ?  in other words it's enough for the device for one clock to be operated properly and finish his work before the second clock .. in this case what happened if I send to that digital device many clocks? will he be off and on and off and on and off and on and off and on .. etc? 

thanks in advance.

Hi Ryan,Let's first of all say that it's good that you are saying you do not fully understand what is happening. I have been in the same place many times in the last 60 years. The Second thing is I am far from an expert.Why have clocks ( watches) in real life? The answer is that we need the reminders a clock gives us to regulate when we do things. For man this essentially is a serial process, clock gives an alarm do something and then wait for the next alarm to remind us to do something else. Yes I know the female of the species is multitasking but they are only multitasking in a serial mode.Clocks become very important in digital electronics because in many designs there will be lots of serial processes going on at the same time and in most cases we will want them to start and finish their jobs at the same time. This is parallel processing and it is what a lot of digital logic is all about and why clocks become so important.Now let's go back to your question, the first device has a process that presents an output to the second device on the first clock cycle. Let's first consider  that all devices on power up have an output that is 0. Device1 starts with an output that is at 0, and  after the first clock cycle it will go to 1. The second device2 on the first clock cycle sees the 0 output on device1 as 0 and its  own output is also 0, so device2 transfers 0 onto its own output. On the second clock cycle if device1 is still giving an output of 1 then device2 will register a 1 on its output. On a third clock cycle if the state of device1 is still 1 then device2 sees its own input as a 1 and will show this on its output as a 1. Now there is one more thing to consider the input state on any device in your thought experiment will only transfer to its output at the end of a clock cycle, so that's why device2 needs two clock cycles before it registers 1 on its output.I hope this helps, if not Max can give you my e-mail address and we can keep on communicating until  you are able to understand the logic, it took me ages to understand clocked logic, combinational logic without clocks is a lot easier. By the way, look at Max Maxfields articles and books on digital electronics. Also look at the articles that Elizabeth one of the forums experts gives about logic chips and understanding them. If you have access to the web then there are a lot of free internet simple digital circuit simulators that allow you to play with logic elements and see their action stage by stage, or on each clock tick.RegardsCrusty

I suggest looking at two Wikipedia articles:Sequential LogicPipeliningUnfortunately, both articles are somewhat theoretical rather than tutorial, but they do have some good examples.
Your question appears to be mostly about pipelining.  Let's say you have a complex logic function -- for example, a floating-point multiplication -- that takes 100 ns to compute.  You can provide new data every 100 ns and wait 100 ns to get the result.  As the new data propagates through your logic, only part of the logic is active at any time.  First the early (upstream) logic changes values, then those values propagate to the next stages, and so on until final values are computed by the last stages.If your logic is like this, you can often take advantage of pipelining.  Let's say you can break up your multiplication into 10 stages, each taking 10 ns to compute.  If you stick a register between each stage, you can start a new multiplication every 10 ns.  It still takes 100 ns to complete a multiplication, but you get a new product every 10 ns.  So you are getting 10 times as many multiplications per second.  There's no magic here: you're just keeping all the logic active.In this scheme, there's a single clock for all the registers.  I like to think of a clock as a traffic light.  During a clock period, signals race through combinational logic (non-clocked logic) but when they get to the register the fastest signals have to wait for the slower signals to catch up.  When the clock occurs, all signals cross the intersection simultaneously and start to race to the next traffic light.
Hope this helps!