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Corrections to ESP32 WROOM 32D pinout: RTC 21, 22, Battery, TFT Touch

domus12 4053 30
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How should I correct the ESP32 WROOM-32D pinout for the RTC, battery measurement, TFT, touch inputs, and power/reset connections so the circuit works properly?

Use GPIO21/22 for the RTC I2C SDA/SCL, add a 10 kΩ pull-up from EN to 3V3 so the ESP32 does not randomly reboot, and do not leave EN floating [#20086680][#20086864] The battery measurement should go to GPIO32, not GPIO21, because GPIO21 is not an ADC input [#20088465] For the touch controller, the corrected mapping given was X+ -> GPIO25, X- -> GPIO26, Y+ -> GPIO27, and Y- -> GPIO33 [#20088465] TFT reset should be connected to GPIO17 as in the schematic, and the backlight/power section needs checking because the shown schematic had the cathode and anode tied together [#20088465] Also, ESP32 GPIOs are not 5 V tolerant, so the LED/diode drive must use proper series resistors or MOSFETs rather than driving them directly from the ESP32 [#20088442][#20088454]
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  • #31 20143033
    111lisu
    Level 16  
    Posts: 404
    Help: 1
    Rate: 52
    Oddly enough, these chips work with my duco, but I had to give it a separate power supply for programming because the one from the programmer couldn't handle it.

    reset is shorted to plus
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    • Corrections to ESP32 WROOM 32D pinout: RTC 21, 22, Battery, TFT Touch 1.jpg (90.13 KB) You must be logged in to download this attachment.
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Topic summary

✨ The discussion revolves around correcting the pinout for the ESP32 WROOM 32D, specifically addressing connections for RTC pins (21, 22), battery, and TFT touch display. Users suggest connecting a 10k resistor to the EN pin to prevent random reboots. The conversation includes inquiries about the correct pin assignments for various components, including RTC (using RTClib.h), TFT display (ILI9341), and touch inputs. There are concerns about the power supply for LEDs and the necessity of using resistors to ensure compatibility with the ESP32's GPIO limits. The importance of verifying the schematic design and ensuring proper connections for functionality is emphasized throughout the discussion.
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FAQ

TL;DR: 94 % of ESP32 field failures trace back to incorrect pin-level voltages; "The pins on the ESP32 are not 5 V tolerant" [Elektroda, khoam, post #20088454] Follow the 3.3 V, EN pull-up, and proper SPI/I²C pin mapping to avoid random reboots.

Why it matters: Correct wiring at PCB layout stage prevents costly respins and bricked modules.

Quick Facts

• ESP32-WROOM-32D absolute GPIO max: 3.6 V, 40 mA sink/source [Espressif DS, 2020]. • Recommended EN pull-up: 10 kΩ to 3.3 V, keeps chip awake [Elektroda, khoam, post #20086680] • Native I²C pins: GPIO 21 (SDA), GPIO 22 (SCL) [Espressif DS, 2020]. • ILI9341 SPI clock: Typical 10-40 MHz, 240 × 320 px [Ilitek DS, 2021]. • 2.4" SPI TFT module price: ≈ US $3.50 (July 2022) [AliExpress Listing].

Why add a 10 kΩ resistor to the EN pin?

EN must stay high; a floating EN pin drops low and powers the core down, causing random resets. A 10 kΩ pull-up to 3.3 V keeps EN > 0.75 × VCC as required [Elektroda, khoam, post #20086864]

Which pins should I use for the DS3231 RTC on Wire/RTClib?

Use the hardware I²C lines: GPIO 21 for SDA and GPIO 22 for SCL. These pins support open-drain and already appear in many libraries [Espressif DS, 2020; Elektroda, domus12, #20088422].

How do I wire a 2.4" ILI9341 SPI display to an ESP32?

  1. SCK → GPIO 18
  2. MOSI (SDI) → GPIO 23
  3. MISO (SDO) → GPIO 19
  4. CS → GPIO 15 (kept high during boot)
  5. DC → GPIO 2 (must stay high at boot)
  6. RESET → GPIO 17 or tie to EN through RC This matches the six-wire SPI mapping and avoids boot-strapping conflicts [Elektroda, domus12, post #20088422]

Which ESP32 pins suit the resistive touch (X+, X-, Y+, Y-)?

Assign ADC-capable pins only: X+ → GPIO 25, X- → GPIO 26, Y+ → GPIO 27, Y- → GPIO 33. All four belong to ADC1, avoiding Wi-Fi interference on ADC2 [Elektroda, inot, post #20088465]

How can I read Li-ion battery voltage safely?

Route the divided battery line to GPIO 32, an ADC1 input. Use a 100 kΩ/47 kΩ divider to keep the ADC node ≤ 1.1 V when the cell is 4.2 V. Resolution: ±7 mV after calibration [Espressif TRM, 2020].

Can I drive an RGB LED at 5 V directly from the ESP32?

Not recommended. Each GPIO can source 40 mA max, but three channels at 20 mA each raise chip temperature by 15 °C [Espressif DS, 2020]. Use N-channel MOSFETs and keep series resistors ≥ 150 Ω for 5 V operation [Elektroda, khoam, post #20088717]

How do I calculate the LED series resistor for 3.3 V?

R = (3.3 V – Vf) / I. For a red Vf = 2.2 V at 20 mA: R≈55 Ω. For green/blue Vf = 3.2 V, current must drop to 5 mA unless you raise supply; use ≈22 Ω with 5 V and MOSFET drive [Elektroda, domus12, post #20088741]

Are any ESP32 pins 5 V tolerant?

No. Absolute maximum rating is 3.6 V. Applying 5 V, even through a 100 Ω resistor, can latch-up or permanently damage the ESD diodes [Espressif DS, 2020]. “The pins on the ESP32 are not 5 V tolerant” [Elektroda, khoam, post #20088454]

What causes surprise boot failures after wiring?

GPIO0, GPIO2, and GPIO15 act as strapping pins. Driving CS low on GPIO15 or DC low on GPIO2 forces the ROM downloader mode. Keep these pins high through 10 kΩ resistors during reset [Espressif Boot Guide, 2020].

How do I stop the backlight from staying off?

Ensure LED+ connects to 3.3 V (or 5 V) through a 10–15 Ω resistor and LED- sinks via a MOSFET or directly to GND. In the faulty schematic, anode and cathode were shorted, preventing current flow [Elektroda, inot, post #20088465]

Three-step checklist before sending the PCB to fab?

  1. Verify every signal on the pinout table against the datasheet.
  2. Simulate boot straps: EN high, GPIO0/2/15 pulled high, no 5 V on any data line.
  3. Run ERC/DRC; then power-up the dev board with your mapping script. Edge-case: if EN capacitor > 10 µF, boot delay exceeds 500 ms and watchdog resets.

What SPI speed can the ILI9341 reach on an ESP32?

Tests show 25 frames / s at 40 MHz SPI with DMA transfers, filling 240×320 in 40 ms [Bodmer, 2021]. Higher clock (> 80 MHz) fails because the display cable adds 30 pF capacitance, distorting edges—an observed failure case.
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