BK7231N SPI Clock Speed Limit: Why drv_spidma.c Caps DCO Source at 30MHz?

I was reading the SPI DMA post, and I am trying to understand the BK7231N clock better. Is it possible to have a SPI clock speed faster than 30 Mhz?

In `drv_spidma.c`, the max frequency gets capped at 30 Mhz when using the DCO clock. Why?

Isn't possible that it could be 60Mhz (with div 1 and max Mh 120)? What about achieving 40MHz by setting DCO clock at 80MHz like it is defined in `spi_bk7231n.c`?

Can we overclock the DCO to achieve more than 120Mhz?

I am playing around with EMI odd harmonics and trying to get the fastest clock speed possible. This is my first time dealing with clock control directly, so please excuse any ignorant questions.



AI: Which SDK or firmware version are you using for the BK7231N?
Flipping between OpenBeken and ESPHome LibreTiny
AI: Can you share more details about your hardware setup—are you using a specific dev board, a custom PCB, or a reference design?
Tuya CBU

This function is more or less a copy from SDK.
In the latest SDK available, clock limit is 30mhz too.
https://github.com/NonPIayerCharacter/beken_f...653a6d88e35d4d/beken378/driver/spi/spi.c#L127
And there is a check, if divider is less than 2, it sets it to 2.

I don't know why it is as it is.

From previous experience more than a year ago, everything above 30MHz for SPI clock will crash OBK at some point + the chip temp would shoot up to 80+ degrees when used and working.

Haven't had time to experiment more on it but my guess is that internal memory that I suppose share that same clock will fail hence crash entire system. Once crashed I had 2 or 3 modules (2 N moduels and one T) unable to boot at all without complete erase and reflash, that was wasting time so I gave up researching more into it.

Just my 2 cents on the matter.