FAQ
TL;DR: PUYA’s PY32F002 ARM-M0+ MCU costs just 0.08 USD, "surprisingly good for such a ridiculous price" [Elektroda, l0ud, post #20366259], and draws ~5 µA in sleep [Elektroda, piotr_go, post #20364764] Ideal for ultra-low-cost 32-bit projects.
Why it matters: You can replace 8-bit parts with a faster, pin-compatible ARM for pocket change.
Quick Facts
• Core: Cortex-M0+ @ 24 / 32 MHz, up to 96 MHz overclocked [Elektroda, piotr_go, post #20380514]
• Memory: 20 kB FLASH / 3 kB RAM (002) — hidden 32 kB FLASH / 4 kB RAM in some lots [Elektroda, piotr_go, post #20375532]
• Peripherals: SPI, USART, I²C, ADC, timers; DMA on 003 & many 002 samples [Elektroda, l0ud, post #20366259]
• Supply: 1.7 – 5.5 V, 5 µA sleep current [Elektroda, piotr_go, post #20364764]
• Price: 0.08 USD each-1000, $0.20 retail at LCSC [Elektroda, piotr_go, #20364764; LCSC pricing]
Where can I buy PY32F002/PY32F003 chips?
LCSC lists all packages from SOP-8 to QFN-32; price starts at USD 0.08 for 1 k tubes [Elektroda, piotr_go, post #20364799] AliExpress stocks the 003 but at higher prices [Elektroda, piotr_go, post #20365201]
Can I flash them with a standard J-Link?
Yes. Copy PUYA *.FLM loaders into /Devices/Puya/ and add the four XML entries shown in the first post, then connect SWDIO/SWCLK/GND/3 V3 [Elektroda, piotr_go, post #20364764]
Is ST-Link V2 usable?
Convert the ST-Link on a NUCLEO to J-Link, then follow the same XML procedure; Segger confirms support for ST-Link-on-board hardware [Elektroda, piotr_go, post #20513639]
Do the 8-pin PY32F002 parts support the serial bootloader?
No BOOT0 pin is exposed, so PuyaISP cannot enter UART mode. Use SWD only [Elektroda, piotr_go, post #20983515]
Quick 3-step J-Link flashing guide
- Wire SWDIO→PA13, SWCLK→PA14, NRST→pin 6, 3 V3, GND.
- Add Puya entries to JLinkDevices.xml.
- Run
JLinkExe
, then loadfile firmware.hex
.
Done in under a minute.
How long does budget shipping from LCSC take?
Global Direct Standard Line costs USD 5.80 and arrives within 7–15 days in Europe, based on repeated orders [Elektroda, piotr_go, post #20382173]
Is existing STM32F0 code portable?
Most binaries run unmodified because registers follow STM32 naming; recompile with Puya headers for full peripheral match [Elektroda, Macosmail, post #20369548] "Changes are implemented in non-collision form" [Elektroda, Macosmail, post #20369548]
What IDEs or SDKs work?
VS Code plus Cortex-Debug + GCC builds fine; OpenOCD or PyOCD handle debug once you add the custom target file [Elektroda, l0ud, post #20576582] A minimal vendor HAL is on GitHub [MiltonLai, #20381781].
How low is the power draw?
With LSI and flash sleep the MCU consumes 8 µA active and ~5 µA in sleep, beating STM32F0 and AVR at equal clock [Elektroda, l0ud, post #20366259]
Can I overclock?
Yes; set FLASH wait-state = 1, tune HSI, and the core runs stably at 96 MHz from RAM. FLASH stops above 48 MHz [Elektroda, piotr_go, post #20380514]
Any hidden ‘bonus’ features?
Many PY32F002AA15 parts actually contain the bigger PY32F030 die with extra USART, SPI, DMA and PLL—32 kB FLASH, 4 kB RAM verified via code readback [Elektroda, piotr_go, post #20375532]
Known edge cases or failures?
Toggling an external RESET sometimes triggers a HardFault while accessing AHB/APB; disable the pin or avoid resets during flash overclocking [Elektroda, piotr_go, post #20364764]
How do I unbrick a mis-configured chip?
Hold NRST low, power up, release NRST, then issue reset halt; flash erase_sector 0 0 last
over OpenOCD. Bootloader lock bits clear, proven on QFN20 parts [Elektroda, wichers, post #20525933]
Are there even cheaper RISC-V options?
Yes; WCH CH32X035 (RV32IMAC, 48 MHz, USB) sells for USD 0.20 retail and < 1 cent in 1 k lots [Elektroda, Grzegorz, #21055396].