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Bouffalo Lab BL616/Ai-Thinker Ai-M62-32S-Kit: OpenBL616

divadiow 522 16
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  • #1 21880795
    divadiow
    Level 38  
    Posts: 4936
    Help: 431
    Rate: 876
    insmod wrote:
    BL chip detection by bootrom version. BL602 - 1, BL702 - 0x7020001, BL616 - 0x6160001. Not known for BL704/706/618.
    Added BL702 and BL616 read. For some reason BL702 write is not working. Didn't bother to fix it. BL616 will read if BL602 or BL702 is selected and BL616 rom version is detected.


    A little topic on my BL616 experiences and some pics of OpenBL616 (in development, general release disabled) and maybe as a place for any future BL616-specific points. 

    BL616/BL618 is Wi-Fi 6 + Bluetooth 5.3 + 802.15.4(Zigbee/Thread) combo chipset for ultra-low-power applications


    Ai-Thinker Ai-M62-32S-Kit from Ali Express
    Bouffalo Lab BL616/Ai-Thinker Ai-M62-32S-Kit: OpenBL616Bouffalo Lab BL616/Ai-Thinker Ai-M62-32S-Kit: OpenBL616

    https://en.ai-thinker.com/pro_view-128.html

    Bouffalo Lab BL616/Ai-Thinker Ai-M62-32S-Kit: OpenBL616


    Easy Flasher dump 4mb
    Bouffalo Lab BL616/Ai-Thinker Ai-M62-32S-Kit: OpenBL616

    boot log 115200
    Code: Text
    Log in, to see the code


    dump + efuse: https://github.com/divadiow/FlashDumps/tree/main/IoT/BL616

    @insmod how are you getting your OpenBL616 to boot? I don't seem to be able to nail the combinations as if AIO or multi-part

    Bouffalo Lab BL616/Ai-Thinker Ai-M62-32S-Kit: OpenBL616
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  • #2 21880816
    insmod
    Level 31  
    Posts: 1367
    Help: 163
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    >>21880795
    4M partition table, boot2, firmware and dts.
    Not single download.


    SDK needs to be updated to last version to make AP work, but i can't do it (i'm on windows, and there's one bugged commit with trailing whitespace in file name).
    Flasher for BL616 must also be fixed (replace https://github.com/openshwprojects/BK7231GUIF...3/BK7231Flasher/Flashers/BL602Flasher.cs#L390 with real flash setup thingy).
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  • #3 21880831
    divadiow
    Level 38  
    Posts: 4936
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    Rate: 876
    insmod wrote:
    4M partition table, boot2, firmware and dts.
    Not single download.


    yeh, image was last-ditch try single download anyway check.

    boot log currently:
    Code: Text
    Log in, to see the code


    insmod wrote:
    and there's one bugged commit with trailing whitespace in file name).


    where's this? this can be fixed in Windows though surely?

    Added after 6 [minutes]:

    Code: Text
    Log in, to see the code
  • #4 21880851
    insmod
    Level 31  
    Posts: 1367
    Help: 163
    Rate: 429
    >>21880831
    An assert is hit somewhere. Breakpoint -> ebreak, usually called via asserts.
    I'll build a new version to check what mepc points to
    My log
    Code: text Expand Select all Copy to clipboard
    boot2_lp:0
r ef:0x2f
psram:13 
custom 0x5f
flash init 0
Boot2 start:May 29 2024,20:22:19
Group=1,CPU Count=1
ver:6.6.2
user_fw 
lp_fw not found
Active PT:0,Age 0
read mfg flag addr:212000
entry ID 0 found
Boot start
Media boot main
R header from 10000
Cal hash addr 0x11000,len 1134400
Hash Success
ps_mode 0,efuse hbn_check_sign 0
group[0] offset 11000 ,core[0] offset 0 bootentry a0000000
Counter value=98
dynamic memory init success
  ocram heap size: 242 Kbyte 

  ____               __  __      _       _       _     
 |  _ \             / _|/ _|    | |     | |     | |    
 | |_) | ___  _   _| |_| |_ __ _| | ___ | | __ _| |__  
 |  _ < / _ \| | | |  _|  _/ _` | |/ _ \| |/ _` | '_ \ 
 | |_) | (_) | |_| | | | || (_| | | (_) | | (_| | |_) |
 |____/ \___/ \__,_|_| |_| \__,_|_|\___/|_|\__,_|_.__/ 

Build:09:49:09, Mar 31 2026
Copyright (c) 2022 Bouffalolab team
Version of used components:
	Version: component_version_macsw_1.7.10
	Version: 2025-11-19 0feb8e5
	Version: component_version_fhost_1.7.10
	Version: component_version_lhal: 2956644f
	Version: component_version_sdk: 2.3.19 2956644f
	Version: component_version_boot2: 6.6.2
======== chip info ========
package          QFN56
flash_info       EXTERNAL
psram_info       WB_4MB
version          A0
======== flash cfg ========
flash clock      40MHz
flash delay      0,0,0
flash size       0x00800000
jedec id         0x1740C8
mid              0xC8
iomode           0x04
clk delay        0x01
clk invert       0x01
read reg cmd0    0x05
read reg cmd1    0x35
write reg cmd0   0x01
write reg cmd1   0x31
qe write len     0x01
cread support    0x01
cread code       0x20
burst wrap cmd   0x77
===========================
uart  sig1:ffffffff, sig2:0000f32f
clock gen1:9dfffffd, gen2:0fff0c11
xtal:40000000Hz(crystal)
board init done
===========================
Active Partition[0] consumed 596 Bytes
======= PtTable_Config @0x62fcd71c=======
magicCode 0x54504642; version 0x0000; entryCnt 8; age 0; crc32 0xE38928F3
idx  type device active_index     name   Address[0]  Address[1]  Length[0]   Length[1]   age
[00]  16     0         0        Boot2  0x00000000  0x00000000  0x0000e000  0x00000000  0
[01]  00     0         0           FW  0x00010000  0x00210000  0x00200000  0x00168000  0
[02]  10     0         0          mfg  0x00210000  0x00000000  0x00168000  0x00000000  0
[03]  02     0         0        media  0x00378000  0x00000000  0x00071000  0x00000000  0
[04]  03     0         0          PSM  0x003e9000  0x00000000  0x00008000  0x00000000  0
[05]  04     0         0          KEY  0x003f1000  0x00000000  0x00002000  0x00000000  0
[06]  05     0         0         DATA  0x003f3000  0x00000000  0x00005000  0x00000000  0
[07]  06     0         0      factory  0x003f8000  0x00000000  0x00008000  0x00000000  0
[I][rfparam] xtal value 40000000
[I][rfparam] dcdc_trim value 3
[I][rfparam] icx value 24
[I][rfparam] iptat value 20
[I][rfparam] tmp_mp use default value 35
[I][rfparam] RF_PARAM TLV ADDRESS: 0xA0000400
[I][rfparam] pwr_mode is bf
Empty slot:0
No written slot found
[I][rfparam] no pwr_offset in efuse
[I][rfparam] tlv wlan pwr_offset[14]: 0,0,0,0,0,0,0,0,0,0,0,0,0,0,
[I][rfparam] wlan pwr_offset[14]: 0,0,0,0,0,0,0,0,0,0,0,0,0,0,
Empty slot:0
No written slot found
[I][rfparam] no lp pwr_offset in efuse
[I][rfparam] tlv wlan lp pwr_offset[14]: 0,0,0,0,0,0,0,0,0,0,0,0,0,0,
[I][rfparam] wlan lp pwr_offset[14]: 0,0,0,0,0,0,0,0,0,0,0,0,0,0,
Empty slot:0
No written slot found
[I][rfparam] no bz pwr_offset in efuse
[I][rfparam] tlv bz pwr_offset[5]: 0,0,0,0,0,
[I][rfparam] bz pwr_offset[5]: 0,0,0,0,0,
[I][rfparam] pwr_11b[4]: 20,20,20,20,
[I][rfparam] pwr_11g[8]: 18,18,18,18,18,18,16,16,
[I][rfparam] pwr_11n_ht20[8]: 18,18,18,18,18,16,15,15,
[I][rfparam] pwr_11n_ht40[8]: 18,18,18,18,18,16,15,14,
[I][rfparam] pwr_11ac_vht20[10]: 18,18,18,18,18,16,15,15,15,14,
[I][rfparam] pwr_11ac_vht40[10]: 18,18,18,18,18,16,15,14,14,13,
[I][rfparam] pwr_11ax_he20[12]: 18,18,18,18,18,16,15,15,15,14,13,13,
[I][rfparam] pwr_11ax_he40[12]: 18,18,18,18,18,16,15,14,14,13,12,12,
[I][rfparam] capcode mode is MF
Empty slot:1
[I][rfparam] efuse capcode_in 32,capcode_out 32
[I][rfparam] capcode_in 32,capcode_out 32
[I][rfparam] tcal.en_tcal = 0
[I][rfparam] tcal.linear_or_follow = 1
[I][rfparam] tcal.Tchannels[5]: 2412,2427,2442,2457,2472,
[I][rfparam] tcal.Tchannel_os[5]: 180,168,163,160,157,
[I][rfparam] tcal.Tchannel_os_low[5]: 199,186,170,165,160,
[I][rfparam] tcal.Troom_os = -1
[I][rfparam] pwr_ble = 13 
[I][rfparam] pwr_bt[3]: 10,8,8,
[I][rfparam] pwr_zigbee = 13 
[I][rfparam] country_code = CN 
[I][rfparam] en_tcap = 0 
[I][rfparam] tcap_tsen[10]: -3,-4,20,39,39,40,41,42,43,44,
[I][rfparam] tcap_cap[11]: 28,29,30,31,32,33,34,35,36,37,38,
OpenBL616, version bl616_7ce9a5a5e55b
Entering initLog()...
Commands registered!
initLog() done!
Main_Init_Before_Delay
[MTD] >>>>>> Hanlde info Dump >>>>>>
      name PSM
      id 0
      offset 0x003e9000(4100096)
      size 0x00008000(32Kbytes)
      xip_addr 0xa03d8000
[MTD] <<<<<< Hanlde info End <<<<<<
ENV AREA SIZE 32768, SECTOR NUM 8
*default_env_size = 0x00000001
Info:MAIN:Main_Init_Before_Delay
addr@0xa01020ac is xip flash, size 6
Warn:CFG:CFG_InitAndLoad: Correct config has been loaded with 4 changes count.
[MTD] >>>>>> Hanlde info Dump >>>>>>
      name media
      id 0
      offset 0x00378000(3637248)
      size 0x00071000(452Kbytes)
      xip_addr 0xa0367000
[MTD] <<<<<< Hanlde info End <<<<<<
Main_Init_Before_Delay done
Main_Init_Delay
Main_Init_Delay done
Info:NTP:CLOCK driver initialized.
Error:CMD:lfs is absent
Info:GEN:PIN_SetupPins pins have been set up.
Info:MAIN:Main_Init_Before_Delay done
Info:MAIN:Main_Init_Delay
Info:MAIN:Main_Init_Delay done
Info:MAIN:Main_Init_After_Delay
Info:MAIN:Using SSID []
Info:MAIN:Using Pass []
Info:HTTP:TCP server listening
Info:MQTT:MQTT_RegisterCallback called for bT bl616CF392881/ subT bl616CF392881/+/set
Info:MQTT:MQTT_RegisterCallback called for bT obks/ subT obks/+/set
Info:MQTT:MQTT_RegisterCallback called for bT cmnd/bl616CF392881/ subT cmnd/bl616CF392881/+
Info:MQTT:MQTT_RegisterCallback called for bT cmnd/obks/ subT cmnd/obks/+
Info:MQTT:MQTT_RegisterCallback called for bT bl616CF392881/ subT bl616CF392881/+/get
Info:MQTT:MQTT_RegisterCallback called for bT homeassistant/ subT homeassistant/+
Info:CMD:CMD_StartScript: started @startup at the beginning
Error:CMD:LFS_ReadFile: lfs is absent
Info:CMD:CMD_StartScript: failed to get file autoexec.bat
Info:MAIN:Main_Init_After_Delay done
Info:MAIN:Time 1, idle 18692628/s, free 280476, MQTT 0(0), bWifi 0, secondsWithNoPing -1, socks 0/0 
Info:MAIN:Time 2, idle 18777421/s, free 280476, MQTT 0(0), bWifi 0, secondsWithNoPing -1, socks 0/0 


    Added after 4 [minutes]:

    Here
    Attachments:
    • dev_20260410_001910.zip (1.33 MB) You must be logged in to download this attachment.
  • #5 21880855
    divadiow
    Level 38  
    Posts: 4936
    Help: 431
    Rate: 876
    insmod wrote:
    Here

    cheers. same breakpoint thing for me with this. it's not important, just playing.
  • #6 21880857
    insmod
    Level 31  
    Posts: 1367
    Help: 163
    Rate: 429
    Another try, i've updated SDK via WSL
    Attachments:
    • dev_20260410_002336.zip (1.33 MB) You must be logged in to download this attachment.
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  • #7 21880858
    divadiow
    Level 38  
    Posts: 4936
    Help: 431
    Rate: 876
    cheers. breakpoint still though.

    Screenshot of Buffalo Lab Dev Cube 1.9.0 showing flashing settings and a 100% progress bar

    Added after 8 [minutes]:

    I see our hardware differs
    QFN56 / 8 MB flash / 4 MB PSRAM vs QFN40 / 4 MB / no PSRAM
  • #8 21880867
    insmod
    Level 31  
    Posts: 1367
    Help: 163
    Rate: 429
    It triggers in bflb_gpio_pad_check. Considering that OBK is not yet initialized, SDK side bug?

    Added after 2 [minutes]:

    Here's a build without it

    I'm using BL618, not 616
    Attachments:
    • dev_20260410_004845.zip (1.33 MB) You must be logged in to download this attachment.
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  • #9 21880870
    divadiow
    Level 38  
    Posts: 4936
    Help: 431
    Rate: 876
    insmod wrote:
    I'm using BL618, not 616


    ah!

    insmod wrote:
    Here's a build without it


    :)
    Code: Text
    Log in, to see the code


    Added after 1 [minutes]:


    Screenshot of the OpenBL616 panel with Config, Restart, and Launch Web Application buttons
  • #10 21881540
    divadiow
    Level 38  
    Posts: 4936
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    Rate: 876
    what even is the function of 
    #define CHECK_PAD(x) if(GLB_GPIO_Pad_LeadOut_Sts((uint8_t)x) == RESET) return


    Added after 6 [minutes]:

    checks for the presence of certain pins and because I have QFN40 BL616 it errors, whereas QFN56 BL618 has more, it's fine?

    apparently:

    Code: C / C++
    Log in, to see the code


    Added after 1 [minutes]:

    so how come the check itself isn't aware of the pins that are correct for BL616 and adjust? Does this mean there should be an OpenBL618? Will all the pins for BL618 still be usable with OpenBL616? If so, what's the point of having the check? questions!
  • Helpful post
    #11 21881881
    insmod
    Level 31  
    Posts: 1367
    Help: 163
    Rate: 429
    >>21881540
    It's already being built as BL616, and considering that Main_Init.is not even called - problem is in SDK.
    Fix is already in XR pr.
  • #13 21890530
    p.kaczmarek2
    Moderator Smart Home  
    Posts: 14505
    Help: 651
    Rate: 12506
    Reading bflb_adc_tsen_get_temp every 10 seconds seems acceptable, but why? Was it limiting perfomance?

    Added after 1 [minutes]:

    What are the advantages of moving those functions to header?
    Code: C / C++
    Log in, to see the code
    Helpful post? Buy me a coffee.
  • Helpful post
    #14 21890541
    insmod
    Level 31  
    Posts: 1367
    Help: 163
    Rate: 429
    >>21890530
    ADC is always costly, especially if it's oversampled.
    I didn't measure how long it took on BLs, but on GD32VW553 with maximum oversampling it took at least a quarter of a second.
    Once every 10 seconds is good enough. I've done the same for XR806/872.

    In that PR, i've also fixed BMP280 + BMPI2C compilation issues, + fixed BMP180.

    On most platforms, binary is a little lighter.
    Comparison by a vibe-coded script
    Code: text Expand Select all Copy to clipboard
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[DIFF (-784 bytes)]
F1: OpenESP8266_2MB_2092_merge_adbd581b0e32.factory.bin (767584)
F2: OpenESP8266_2MB_1.18.287.factory.bin (768368)

[DIFF (-784 bytes)]
F1: OpenESP8266_2092_merge_adbd581b0e32.img (702048)
F2: OpenESP8266_1.18.287.img (702832)

[DIFF (-736 bytes)]
F1: OpenRTL8710B_2092_merge_adbd581b0e32_ota.img (1270288)
F2: OpenRTL8710B_1.18.287_ota.img (1271024)

[DIFF (-736 bytes)]
F1: OpenRTL8710B_UG_2092_merge_adbd581b0e32.img (1270336)
F2: OpenRTL8710B_UG_1.18.287.img (1271072)

[DIFF (-704 bytes)]
F1: OpenESP32_2092_merge_adbd581b0e32_4M.img (1036880)
F2: OpenESP32_1.18.287_4M.img (1037584)

[DIFF (-704 bytes)]
F1: OpenESP32_2092_merge_adbd581b0e32_4M.factory.bin (1102416)
F2: OpenESP32_1.18.287_4M.factory.bin (1103120)

[DIFF (-688 bytes)]
F1: OpenESP32S3_2092_merge_adbd581b0e32_4M.factory.bin (1102144)
F2: OpenESP32S3_1.18.287_4M.factory.bin (1102832)

[DIFF (-688 bytes)]
F1: OpenESP32S3_2092_merge_adbd581b0e32_4M.img (1036608)
F2: OpenESP32S3_1.18.287_4M.img (1037296)

[DIFF (-680 bytes)]
F1: OpenLN8825_2092_merge_adbd581b0e32.bin (922168)
F2: OpenLN8825_1.18.287.bin (922848)

[DIFF (-672 bytes)]
F1: OpenESP32S2_2092_merge_adbd581b0e32_4M.factory.bin (1065216)
F2: OpenESP32S2_1.18.287_4M.factory.bin (1065888)

[DIFF (-672 bytes)]
F1: OpenESP32S2_2092_merge_adbd581b0e32_4M.img (999680)
F2: OpenESP32S2_1.18.287_4M.img (1000352)

[DIFF (-516 bytes)]
F1: OpenRTL8710A_2092_merge_adbd581b0e32.bin (690116)
F2: OpenRTL8710A_1.18.287.bin (690632)

[DIFF (-516 bytes)]
F1: OpenRTL8710A_2092_merge_adbd581b0e32_ota.img (645064)
F2: OpenRTL8710A_1.18.287_ota.img (645580)

[DIFF (-512 bytes)]
F1: OpenTR6260_2092_merge_adbd581b0e32.bin (671272)
F2: OpenTR6260_1.18.287.bin (671784)

[DIFF (-512 bytes)]
F1: OpenTXW81X_2092_merge_adbd581b0e32.bin (606224)
F2: OpenTXW81X_1.18.287.bin (606736)

[DIFF (-424 bytes)]
F1: OpenLN882H_2092_merge_adbd581b0e32_btproxy.bin (979976)
F2: OpenLN882H_1.18.287_btproxy.bin (980400)

[DIFF (-408 bytes)]
F1: OpenBK7238_2092_merge_adbd581b0e32_berry.bin (842904)
F2: OpenBK7238_1.18.287_berry.bin (843312)

[DIFF (-408 bytes)]
F1: OpenLN882H_2092_merge_adbd581b0e32.bin (734328)
F2: OpenLN882H_1.18.287.bin (734736)

[DIFF (-400 bytes)]
F1: OpenBK7231N_ALT_2092_merge_adbd581b0e32.bin (752192)
F2: OpenBK7231N_ALT_1.18.287.bin (752592)

[DIFF (-392 bytes)]
F1: OpenBK7252N_2092_merge_adbd581b0e32.bin (724548)
F2: OpenBK7252N_1.18.287.bin (724940)

[DIFF (-392 bytes)]
F1: OpenBK7238_2092_merge_adbd581b0e32_btproxy.bin (948752)
F2: OpenBK7238_1.18.287_btproxy.bin (949144)

[DIFF (-376 bytes)]
F1: OpenBK7231N_ALT_2092_merge_adbd581b0e32_btproxy.bin (906248)
F2: OpenBK7231N_ALT_1.18.287_btproxy.bin (906624)

[DIFF (-376 bytes)]
F1: OpenBK7231T_ALT_2092_merge_adbd581b0e32.bin (749872)
F2: OpenBK7231T_ALT_1.18.287.bin (750248)

[DIFF (-376 bytes)]
F1: OpenBK7231U_2092_merge_adbd581b0e32.bin (751800)
F2: OpenBK7231U_1.18.287.bin (752176)

[DIFF (-376 bytes)]
F1: OpenBK7238_2092_merge_adbd581b0e32.bin (745968)
F2: OpenBK7238_1.18.287.bin (746344)

[DIFF (-376 bytes)]
F1: OpenBK7238_2092_merge_adbd581b0e32_irRemoteESP.bin (822584)
F2: OpenBK7238_1.18.287_irRemoteESP.bin (822960)

[DIFF (-372 bytes)]
F1: OpenBK7238_2092_merge_adbd581b0e32_battery.bin (715320)
F2: OpenBK7238_1.18.287_battery.bin (715692)

[DIFF (-368 bytes)]
F1: OpenRTL8710B_2092_merge_adbd581b0e32.bin (680196)
F2: OpenRTL8710B_1.18.287.bin (680564)

[DIFF (-368 bytes)]
F1: OpenBK7252_2092_merge_adbd581b0e32.bin (730508)
F2: OpenBK7252_1.18.287.bin (730876)

[DIFF (-320 bytes)]
F1: OpenRTL8721DA_2092_merge_adbd581b0e32_ota.img (1489120)
F2: OpenRTL8721DA_1.18.287_ota.img (1489440)

[DIFF (-320 bytes)]
F1: OpenRDA5981_2092_merge_adbd581b0e32.bin (511156)
F2: OpenRDA5981_1.18.287.bin (511476)

[DIFF (-320 bytes)]
F1: OpenRTL8721DA_2092_merge_adbd581b0e32.bin (1571008)
F2: OpenRTL8721DA_1.18.287.bin (1571328)

[DIFF (-312 bytes)]
F1: OpenBK7231T_2092_merge_adbd581b0e32_powerMetering.bin (773285)
F2: OpenBK7231T_1.18.287_powerMetering.bin (773597)

[DIFF (-296 bytes)]
F1: OpenBK7231N_2092_merge_adbd581b0e32_powerMetering.bin (804029)
F2: OpenBK7231N_1.18.287_powerMetering.bin (804325)

[DIFF (-295 bytes)]
F1: OpenECR6600_2092_merge_adbd581b0e32_ota.img (534906)
F2: OpenECR6600_1.18.287_ota.img (535201)

[DIFF (-288 bytes)]
F1: OpenRTL8720E_2092_merge_adbd581b0e32.bin (1309216)
F2: OpenRTL8720E_1.18.287.bin (1309504)

[DIFF (-288 bytes)]
F1: OpenRTL8720E_2092_merge_adbd581b0e32_ota.img (1227328)
F2: OpenRTL8720E_1.18.287_ota.img (1227616)

[DIFF (-280 bytes)]
F1: OpenBK7231T_2092_merge_adbd581b0e32_irRemoteESP.bin (896845)
F2: OpenBK7231T_1.18.287_irRemoteESP.bin (897125)

[DIFF (-272 bytes)]
F1: OpenBK7231N_2092_merge_adbd581b0e32_irRemoteESP.bin (921541)
F2: OpenBK7231N_1.18.287_irRemoteESP.bin (921813)

[DIFF (-264 bytes)]
F1: OpenBK7231N_2092_merge_adbd581b0e32_sensors.bin (817769)
F2: OpenBK7231N_1.18.287_sensors.bin (818033)

[DIFF (-264 bytes)]
F1: OpenBK7231T_2092_merge_adbd581b0e32_sensors.bin (785417)
F2: OpenBK7231T_1.18.287_sensors.bin (785681)

[DIFF (-248 bytes)]
F1: OpenBK7231N_2092_merge_adbd581b0e32_hlw8112.bin (710909)
F2: OpenBK7231N_1.18.287_hlw8112.bin (711157)

[DIFF (-240 bytes)]
F1: OpenBK7231T_2092_merge_adbd581b0e32_berry.bin (894993)
F2: OpenBK7231T_1.18.287_berry.bin (895233)

[DIFF (-232 bytes)]
F1: OpenBK7231N_2092_merge_adbd581b0e32.bin (826449)
F2: OpenBK7231N_1.18.287.bin (826681)

[DIFF (-232 bytes)]
F1: OpenBK7231T_2092_merge_adbd581b0e32.bin (792633)
F2: OpenBK7231T_1.18.287.bin (792865)

[DIFF (-224 bytes)]
F1: OpenBK7231T_2092_merge_adbd581b0e32_tuyaMCU.bin (773485)
F2: OpenBK7231T_1.18.287_tuyaMCU.bin (773709)

[DIFF (-216 bytes)]
F1: OpenBK7231N_2092_merge_adbd581b0e32_berry.bin (928817)
F2: OpenBK7231N_1.18.287_berry.bin (929033)

[DIFF (-216 bytes)]
F1: OpenBK7231N_2092_merge_adbd581b0e32_tuyaMCU.bin (802845)
F2: OpenBK7231N_1.18.287_tuyaMCU.bin (803061)

[DIFF (-208 bytes)]
F1: OpenBK7231N_2092_merge_adbd581b0e32_battery.bin (731277)
F2: OpenBK7231N_1.18.287_battery.bin (731485)

[DIFF (-208 bytes)]
F1: OpenESP32C2_2092_merge_adbd581b0e32_4M.factory.bin (1071600)
F2: OpenESP32C2_1.18.287_4M.factory.bin (1071808)

[DIFF (-208 bytes)]
F1: OpenESP32C5_2092_merge_adbd581b0e32_4M.factory.bin (1273760)
F2: OpenESP32C5_1.18.287_4M.factory.bin (1273968)

[DIFF (-208 bytes)]
F1: OpenESP32C5_2092_merge_adbd581b0e32_4M.img (1208224)
F2: OpenESP32C5_1.18.287_4M.img (1208432)

[DIFF (-208 bytes)]
F1: OpenESP32C2_2092_merge_adbd581b0e32_4M.img (1006064)
F2: OpenESP32C2_1.18.287_4M.img (1006272)

[DIFF (-192 bytes)]
F1: OpenESP32C3_2092_merge_adbd581b0e32_2M.img (973744)
F2: OpenESP32C3_1.18.287_2M.img (973936)

[DIFF (-192 bytes)]
F1: OpenESP32C3_2092_merge_adbd581b0e32_4M.img (1124096)
F2: OpenESP32C3_1.18.287_4M.img (1124288)

[DIFF (-192 bytes)]
F1: OpenESP32C2_2092_merge_adbd581b0e32_2M.factory.bin (934608)
F2: OpenESP32C2_1.18.287_2M.factory.bin (934800)

[DIFF (-192 bytes)]
F1: OpenESP32C61_2092_merge_adbd581b0e32_4M.factory.bin (1239712)
F2: OpenESP32C61_1.18.287_4M.factory.bin (1239904)

[DIFF (-192 bytes)]
F1: OpenESP32C61_2092_merge_adbd581b0e32_4M.img (1174176)
F2: OpenESP32C61_1.18.287_4M.img (1174368)

[DIFF (-192 bytes)]
F1: OpenESP32C6_2092_merge_adbd581b0e32_4M.img (1220848)
F2: OpenESP32C6_1.18.287_4M.img (1221040)

[DIFF (-192 bytes)]
F1: OpenESP32C3_2092_merge_adbd581b0e32_2M.factory.bin (1039280)
F2: OpenESP32C3_1.18.287_2M.factory.bin (1039472)

[DIFF (-192 bytes)]
F1: OpenESP32C3_2092_merge_adbd581b0e32_4M.factory.bin (1189632)
F2: OpenESP32C3_1.18.287_4M.factory.bin (1189824)

[DIFF (-192 bytes)]
F1: OpenESP32C2_2092_merge_adbd581b0e32_2M.img (869072)
F2: OpenESP32C2_1.18.287_2M.img (869264)

[DIFF (-192 bytes)]
F1: OpenESP32C6_2092_merge_adbd581b0e32_4M.factory.bin (1286384)
F2: OpenESP32C6_1.18.287_4M.factory.bin (1286576)

[DIFF (-180 bytes)]
F1: OpenBL602_2092_merge_adbd581b0e32_OTA.bin.xz.ota (433660)
F2: OpenBL602_1.18.287_OTA.bin.xz.ota (433840)

[DIFF (-180 bytes)]
F1: OpenBL602_2092_merge_adbd581b0e32_OTA.bin.xz (433148)
F2: OpenBL602_1.18.287_OTA.bin.xz (433328)

[DIFF (-176 bytes)]
F1: OpenBK7231T_UG_2092_merge_adbd581b0e32_tuyaMCU.bin (497488)
F2: OpenBK7231T_UG_1.18.287_powerMetering.bin (497664)

[DIFF (-176 bytes)]
F1: OpenBK7231T_2092_merge_adbd581b0e32_tuyaMCU.rbl (497456)
F2: OpenBK7231T_1.18.287_powerMetering.rbl (497632)

[DIFF (-160 bytes)]
F1: OpenBK7231N_ALT_2092_merge_adbd581b0e32_btproxy.rbl (615680)
F2: OpenBK7231N_ALT_1.18.287_btproxy.rbl (615840)

[DIFF (-152 bytes)]
F1: OpenW800_2092_merge_adbd581b0e32.fls (708260)
F2: OpenW800_1.18.287.fls (708412)

[DIFF (-132 bytes)]
F1: OpenTXW81X_2092_merge_adbd581b0e32_ota.img (424620)
F2: OpenTXW81X_1.18.287_ota.img (424752)

[DIFF (-128 bytes)]
F1: OpenBL602_2092_merge_adbd581b0e32_berry.bin (907268)
F2: OpenBL602_1.18.287_berry.bin (907396)

[DIFF (-128 bytes)]
F1: OpenBL602_2092_merge_adbd581b0e32_berry_OTA.bin (911376)
F2: OpenBL602_1.18.287_berry_OTA.bin (911504)

[DIFF (-128 bytes)]
F1: OpenBK7231U_2092_merge_adbd581b0e32.rbl (503168)
F2: OpenBK7231U_1.18.287.rbl (503296)

[DIFF (-128 bytes)]
F1: OpenBK7238_2092_merge_adbd581b0e32_berry.rbl (567648)
F2: OpenBK7238_1.18.287_berry.rbl (567776)

[DIFF (-120 bytes)]
F1: OpenBL602_2092_merge_adbd581b0e32_berry_OTA.bin.xz.ota (501856)
F2: OpenBL602_1.18.287_berry_OTA.bin.xz.ota (501976)

[DIFF (-120 bytes)]
F1: OpenBL602_2092_merge_adbd581b0e32_berry_OTA.bin.xz (501344)
F2: OpenBL602_1.18.287_berry_OTA.bin.xz (501464)

[DIFF (-112 bytes)]
F1: OpenBL602_2092_merge_adbd581b0e32.bin (781932)
F2: OpenBL602_1.18.287.bin (782044)

[DIFF (-112 bytes)]
F1: OpenBL602_2092_merge_adbd581b0e32_OTA.bin (786032)
F2: OpenBL602_1.18.287_OTA.bin (786144)

[DIFF (-112 bytes)]
F1: OpenBK7252_2092_merge_adbd581b0e32.rbl (490176)
F2: OpenBK7252_1.18.287.rbl (490288)

[DIFF (-112 bytes)]
F1: OpenBK7238_2092_merge_adbd581b0e32_btproxy.rbl (650848)
F2: OpenBK7238_1.18.287_btproxy.rbl (650960)

[DIFF (-64 bytes)]
F1: OpenBK7231N_UG_2092_merge_adbd581b0e32_sensors.bin (513504)
F2: OpenBK7231N_UG_1.18.287_sensors.bin (513568)

[DIFF (-64 bytes)]
F1: OpenBK7231N_2092_merge_adbd581b0e32_sensors.rbl (513472)
F2: OpenBK7231N_1.18.287_sensors.rbl (513536)

[DIFF (-64 bytes)]
F1: OpenBK7231N_ALT_2092_merge_adbd581b0e32.rbl (504752)
F2: OpenBK7231N_ALT_1.18.287.rbl (504816)

[DIFF (-64 bytes)]
F1: OpenBK7231T_UG_2092_merge_adbd581b0e32.bin (495488)
F2: OpenBK7231T_UG_1.18.287.bin (495552)

[DIFF (-64 bytes)]
F1: OpenBK7231T_2092_merge_adbd581b0e32.rbl (495456)
F2: OpenBK7231T_1.18.287.rbl (495520)

[DIFF (-48 bytes)]
F1: OpenBK7252N_2092_merge_adbd581b0e32.rbl (490512)
F2: OpenBK7252N_1.18.287.rbl (490560)

[DIFF (-16 bytes)]
F1: OpenBK7238_2092_merge_adbd581b0e32_battery.rbl (481552)
F2: OpenBK7238_1.18.287_battery.rbl (481568)

[DIFF (-16 bytes)]
F1: OpenBK7231N_UG_2092_merge_adbd581b0e32_battery.bin (471872)
F2: OpenBK7231N_UG_1.18.287_battery.bin (471888)

[DIFF (-16 bytes)]
F1: OpenBK7231N_2092_merge_adbd581b0e32_battery.rbl (471840)
F2: OpenBK7231N_1.18.287_battery.rbl (471856)

[DIFF (-16 bytes)]
F1: OpenBK7231T_UG_2092_merge_adbd581b0e32_irRemoteESP.bin (562256)
F2: OpenBK7231T_UG_1.18.287_irRemoteESP.bin (562272)

[DIFF (-16 bytes)]
F1: OpenBK7231T_2092_merge_adbd581b0e32_irRemoteESP.rbl (562224)
F2: OpenBK7231T_1.18.287_irRemoteESP.rbl (562240)

[DIFF (-16 bytes)]
F1: OpenBK7231T_ALT_2092_merge_adbd581b0e32.rbl (502528)
F2: OpenBK7231T_ALT_1.18.287.rbl (502544)

[SAME]
F1: OpenXR872_2092_merge_adbd581b0e32.img (794456)
F2: OpenXR872_1.18.287.img (794456)

[SAME]
F1: OpenBK7238_2092_merge_adbd581b0e32.rbl (504384)
F2: OpenBK7238_1.18.287.rbl (504384)

[SAME]
F1: OpenRTL87X0C_2092_merge_adbd581b0e32_btproxy_ota.img (860228)
F2: OpenRTL87X0C_1.18.287_btproxy_ota.img (860228)

[SAME]
F1: OpenRTL87X0C_2092_merge_adbd581b0e32_ota.img (770052)
F2: OpenRTL87X0C_1.18.287_ota.img (770052)

[SAME]
F1: OpenBK7231N_ALT_QIO_2092_merge_adbd581b0e32.bin (1253376)
F2: OpenBK7231N_ALT_QIO_1.18.287.bin (1253376)

[SAME]
F1: OpenBK7231N_ALT_QIO_2092_merge_adbd581b0e32_btproxy.bin (1253376)
F2: OpenBK7231N_ALT_QIO_1.18.287_btproxy.bin (1253376)

[SAME]
F1: OpenBK7231N_ALT_UA_2092_merge_adbd581b0e32.bin (1183744)
F2: OpenBK7231N_ALT_UA_1.18.287.bin (1183744)

[SAME]
F1: OpenBK7231N_ALT_UA_2092_merge_adbd581b0e32_btproxy.bin (1183744)
F2: OpenBK7231N_ALT_UA_1.18.287_btproxy.bin (1183744)

[SAME]
F1: OpenBK7231N_QIO_2092_merge_adbd581b0e32.bin (1220464)
F2: OpenBK7231N_QIO_1.18.287.bin (1220464)

[SAME]
F1: OpenBK7231N_QIO_2092_merge_adbd581b0e32_battery.bin (1220464)
F2: OpenBK7231N_QIO_1.18.287_battery.bin (1220464)

[SAME]
F1: OpenBK7231N_QIO_2092_merge_adbd581b0e32_berry.bin (1220464)
F2: OpenBK7231N_QIO_1.18.287_berry.bin (1220464)

[SAME]
F1: OpenBK7231N_QIO_2092_merge_adbd581b0e32_hlw8112.bin (1220464)
F2: OpenBK7231N_QIO_1.18.287_hlw8112.bin (1220464)

[SAME]
F1: OpenBK7231N_QIO_2092_merge_adbd581b0e32_irRemoteESP.bin (1220464)
F2: OpenBK7231N_QIO_1.18.287_irRemoteESP.bin (1220464)

[SAME]
F1: OpenBK7231N_QIO_2092_merge_adbd581b0e32_powerMetering.bin (1220464)
F2: OpenBK7231N_QIO_1.18.287_powerMetering.bin (1220464)

[SAME]
F1: OpenBK7231N_QIO_2092_merge_adbd581b0e32_sensors.bin (1220464)
F2: OpenBK7231N_QIO_1.18.287_sensors.bin (1220464)

[SAME]
F1: OpenBK7231N_QIO_2092_merge_adbd581b0e32_tuyaMCU.bin (1220464)
F2: OpenBK7231N_QIO_1.18.287_tuyaMCU.bin (1220464)

[SAME]
F1: OpenBK7231N_UA_2092_merge_adbd581b0e32.bin (1150832)
F2: OpenBK7231N_UA_1.18.287.bin (1150832)

[SAME]
F1: OpenBK7231N_UA_2092_merge_adbd581b0e32_battery.bin (1150832)
F2: OpenBK7231N_UA_1.18.287_battery.bin (1150832)

[SAME]
F1: OpenBK7231N_UA_2092_merge_adbd581b0e32_berry.bin (1150832)
F2: OpenBK7231N_UA_1.18.287_berry.bin (1150832)

[SAME]
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F2: OpenBK7231N_UA_1.18.287_powerMetering.bin (1150832)

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F2: OpenBK7231N_UA_1.18.287_sensors.bin (1150832)

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F1: OpenBK7231N_UA_2092_merge_adbd581b0e32_tuyaMCU.bin (1150832)
F2: OpenBK7231N_UA_1.18.287_tuyaMCU.bin (1150832)

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F2: OpenBK7252N_QIO_1.18.287.bin (1253376)

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F1: OpenBK7252N_UA_2092_merge_adbd581b0e32.bin (1183744)
F2: OpenBK7252N_UA_1.18.287.bin (1183744)

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F1: OpenRTL8720D_2092_merge_adbd581b0e32_ota.img (1114144)
F2: OpenRTL8720D_1.18.287_ota.img (1114144)

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F2: OpenBK7231M_ALT_QIO_1.18.287_btproxy.bin (1253376)

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F2: OpenBK7231T_QIO_1.18.287_berry.bin (1048576)

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F2: OpenBK7231T_QIO_1.18.287_powerMetering.bin (1048576)

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F2: OpenBK7231T_UA_1.18.287_tuyaMCU.bin (978944)

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F2: OpenBK7231T_UG_1.18.287_tuyaMCU.bin (497648)

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F2: OpenBK7231U_UA_1.18.287.bin (1183744)

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F1: OpenBK7238_QIO_2092_merge_adbd581b0e32_berry.bin (1253376)
F2: OpenBK7238_QIO_1.18.287_berry.bin (1253376)

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F1: OpenBK7238_QIO_2092_merge_adbd581b0e32_btproxy.bin (1253376)
F2: OpenBK7238_QIO_1.18.287_btproxy.bin (1253376)

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F1: OpenBK7238_QIO_2092_merge_adbd581b0e32_irRemoteESP.bin (1253376)
F2: OpenBK7238_QIO_1.18.287_irRemoteESP.bin (1253376)

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F2: OpenBK7238_UA_1.18.287.bin (1183744)

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F1: OpenBK7238_UA_2092_merge_adbd581b0e32_battery.bin (1183744)
F2: OpenBK7238_UA_1.18.287_battery.bin (1183744)

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F1: OpenBK7238_UA_2092_merge_adbd581b0e32_berry.bin (1183744)
F2: OpenBK7238_UA_1.18.287_berry.bin (1183744)

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F1: OpenBK7238_UA_2092_merge_adbd581b0e32_btproxy.bin (1183744)
F2: OpenBK7238_UA_1.18.287_btproxy.bin (1183744)

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F1: OpenBK7238_UA_2092_merge_adbd581b0e32_irRemoteESP.bin (1183744)
F2: OpenBK7238_UA_1.18.287_irRemoteESP.bin (1183744)

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F1: OpenRTL8720D_2092_merge_adbd581b0e32.bin (1138688)
F2: OpenRTL8720D_1.18.287.bin (1138688)

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F1: OpenBK7231T_2092_merge_adbd581b0e32_powerMetering.rbl (497616)
F2: OpenBK7231T_1.18.287_tuyaMCU.rbl (497616)

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F1: OpenXR809_2092_merge_adbd581b0e32.img (916264)
F2: OpenXR809_1.18.287.img (916264)
  • #15 21894714
    divadiow
    Level 38  
    Posts: 4936
    Help: 431
    Rate: 876
    all sounds good!
  • #17 21910474
    insmod
    Level 31  
    Posts: 1367
    Help: 163
    Rate: 429
    Doesn't work on 618
    Code: text Expand Select all Copy to clipboard
    BootROM version: 102105089 (6160001)
OTP flags:
00000000 00000000 00000001 00000000 
00100111 00010010 10001001 00000001 
10000001 00101000 00111001 11001111 
00001110 10110100 10011011 00000000 
Chip type: BL616

Switching BL616 operation baud to 2000000...
Flash ID read failed, retrying BL616 flash parameter setup once...
Failed to get BL616 flash ID.
There was no result to save.


    Must it be in a separate file? The only real change that it requires is flash_set_para.
    As it is, BL616_FLASH_SET_PARA is hardcoded. It should be getting it from efuse (i think?)

    Also, this block can be removed
    Code: text Expand Select all Copy to clipboard
    OBK config read is not supported on BL616 yet.


    OpenBL616 is good enough, but i haven't included it because there are no real devices using it yet
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Topic summary

✨ Discussion of Bouffalo Lab BL616/OpenBL616 development on an Ai-Thinker Ai-M62-32S-Kit board, including flash dumps, efuse data, boot logs, and early firmware bring-up. The board is identified as QFN40 with 4 MB flash and no PSRAM, while another tested configuration is noted as QFN56 with 8 MB flash and 4 MB PSRAM. The main issue is a breakpoint/assert failure during boot, traced to bflb_gpio_pad_check before OpenBL616 initialization. Suggested actions include updating the SDK to the latest version, fixing the BL616 flasher flash-setup code, and rebuilding with WSL; after removing the problematic check, boot proceeds further and the chip reports successful dynamic memory initialization and flash configuration.
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FAQ

TL;DR: For Ai-Thinker Ai-M62-32S-Kit users, OpenBL616 works when you flash 4 MB images separately, not as one file: as one expert put it, "Not single download." This FAQ explains the correct boot2/partition/firmware/DTS layout, why early ebreak crashes happen, and how BL616 QFN40 differs from BL618 boards during bring-up. [#21880816]

Why it matters: This thread pinpoints the real blockers to first boot on Bouffalo Lab BL616 boards: image layout, SDK pin checks, and package-specific hardware differences.

Item BL616 QFN40 board BL618 QFN56 board
Package QFN40 QFN56
Flash 4 MB 8 MB
PSRAM None 4 MB
Result in thread Needed no-pad-check build Booted OpenBL616 build earlier

Key insight: The main failure was not the flashing process alone. The decisive issue was an SDK-side GPIO pad check that could trigger ebreak before normal app initialization on BL616-class hardware.

Quick Facts

  • BL616/BL618 is described in the thread as a combo chipset with Wi‑Fi 6, Bluetooth 5.3, and 802.15.4 for Zigbee/Thread, aimed at ultra-low-power devices. [#21880795]
  • The Ai-M62-32S-Kit dump shows 4 MB flash, boot log speed 115200, SDK release_bl_iot_sdk_1.6.40, and firmware V4.18_P2.1.0 built on Nov 19 2024. [#21880795]
  • A working BL616 flash session wrote boot2 at 0x00000000, partition copies at 0x0000E000 and 0x0000F000, firmware at 0x00010000, and DTS-derived ro_params.dtb at 0x003F8000. [#21880831]
  • The stable OpenBL616 boot shown later used SDK 2.3.21, Boot2 6.6.2, 40 MHz flash clock, JEDEC ID 0x1660C8, and reached AP mode with DHCP range 192.168.4.100–192.168.4.199. [#21880870]

How do you flash OpenBL616 onto an Ai-Thinker Ai-M62-32S-Kit with the correct 4 MB partition table, boot2, firmware, and DTS instead of using a single-image download?

Flash it as four separate components, not as one combined image. 1. Write whole_img_boot2.bin to 0x00000000. 2. Write the 4 MB partition table to 0x0000E000 and 0x0000F000, then flash whole_img.bin to 0x00010000. 3. Convert the DTS to ro_params.dtb and write it to 0x003F8000. The successful session verified all hashes and finished in about 12508 ms. The thread’s explicit guidance was: “Not single download.” [#21880831]

Why does OpenBL616 hit a Breakpoint or ebreak during boot on some BL616/BL618 builds, and what does the mepc exception address tell you?

It hits ebreak because an assert or pad-check trap fires very early in boot. The mepc value points to the instruction address that triggered the exception, so it helps locate the failing function in the SDK or build. One failing BL616 log showed mepc:a006873a with mcause=30000003, then Breakpoint. Later testing traced the fault to bflb_gpio_pad_check, not normal app logic. That matters because Main_Init had not even started yet. [#21880831]

What is the bflb_gpio_pad_check function in the Bouffalo Lab SDK, and why can it trigger an ebreak on BL616 hardware?

bflb_gpio_pad_check is an SDK guard that verifies whether a GPIO pad is actually bonded out on the package before code uses it. In the thread, its logic called asm("ebreak") when GLB_GPIO_Pad_LeadOut_Sts(pin) == RESET. On BL616 QFN40, fewer pads are exposed than on BL618 QFN56, so a check against a non-existent pad can halt the CPU immediately. That makes it an SDK-side package-awareness problem, not a normal OpenBL616 runtime error. [#21881540]

How does the BL616 QFN40 4 MB no-PSRAM variant differ from the BL618 QFN56 8 MB flash 4 MB PSRAM variant when running OpenBL616?

The BL616 board in the thread is smaller and less provisioned, so package-specific pin assumptions can break boot. The working comparison was explicit: BL618 used QFN56 / 8 MB flash / 4 MB PSRAM, while the Ai-M62-32S-Kit used QFN40 / 4 MB / no PSRAM. The BL618 setup booted OpenBL616 earlier, while the BL616 needed a build without the failing pad check. That difference explains why the same firmware branch behaved differently across two boards. [#21880858]

What changes are needed in BK7231GUIFlashTool or BL602Flasher.cs to properly support flashing BL616 devices?

The BL616 flasher path needs BL616-specific flash setup instead of reusing the BL602 logic. The thread states that BL602Flasher.cs must be fixed by replacing the code around the referenced line with the “real flash setup thingy” for BL616. Earlier notes also said BL616 readout works when BL602 or BL702 is selected and the BL616 ROM version is detected, but write support needed proper handling. In short, detection partly worked; flashing support still needed code changes. [#21880816]

Why was the latest Bouffalo Lab SDK needed to make AP mode work on BL616, and what Windows build issue was blocking the update?

The newer SDK was needed because the older build did not make AP mode work correctly on BL616. The blocker was a Windows-side source tree issue: one commit had a filename with trailing whitespace, which broke normal Windows handling. The developer said they could update it only after moving to WSL. Once a newer build appeared, the BL616 log showed AP startup, SSID creation, and DHCP service, confirming that the SDK update mattered. [#21880816]

What is the BL616/BL618 combo chipset, and which wireless standards does it support for Wi-Fi, Bluetooth, Zigbee, and Thread?

The BL616/BL618 is a low-power wireless combo SoC family. The thread describes it as “Wi‑Fi 6 + Bluetooth 5.3 + 802.15.4(Zigbee/Thread) combo chipset for ultra-low-power applications.” That means one chip family can cover Wi‑Fi, BLE/BT, and 802.15.4 networks used by Zigbee and Thread devices. For bring-up work, that matters because the same firmware platform may later expose AP, MQTT, and IoT mesh-related features on supported boards. [#21880795]

What is Boot2 on Bouffalo Lab BL616, and how does it relate to the partition table and firmware boot process?

“Boot2” is a second-stage bootloader that initializes flash settings, reads the partition table, verifies firmware, and jumps to the application entry point. In the thread, Boot2 version 6.6.2 read the active partition table, loaded firmware from 0x00010000, calculated a hash from 0x11000, and then booted the user image. The partition table defined entries such as Boot2, FW, mfg, media, PSM, KEY, DATA, and factory, so Boot2 depended on that layout to boot cleanly. [#21880851]

How can you identify a Bouffalo Lab chip by boot ROM version, such as BL602, BL702, and BL616?

You can identify it by reading the Boot ROM version value during handshake or dump analysis. The thread lists these mappings: BL602 = 1, BL702 = 0x7020001, and BL616 = 0x6160001. That let the tooling detect BL616 even when BL602 or BL702 was selected in some cases. It also explains why partial read support appeared before proper write support: ROM detection was already known, but the full flashing path still needed fixes. [#21880795]

What does the BL616 boot log reveal about flash size, JEDEC ID, RF parameters, and active partitions when troubleshooting a new board?

A good BL616 boot log reveals whether the board definition matches real hardware. In the successful QFN40 log, it reported flash size 0x00400000, JEDEC ID 0x1660C8, 40MHz flash clock, package QFN40, and active partition table entry count 8. It also showed RF defaults such as country code CN, BLE power 13, Zigbee power 13, and multiple WLAN power tables. Those lines quickly confirm flash geometry, radio calibration state, and whether the partition layout is sane. [#21880870]

Why does the CHECK_PAD macro return or break on some pins, and how should pin validation behave on BL616 versus BL618 packages?

It returns or breaks because it checks whether a given GPIO pad is physically leaded out on that package. The macro shown was #define CHECK_PAD(x) if(GLB_GPIO_Pad_LeadOut_Sts((uint8_t)x) == RESET) return, and the related function variant used ebreak instead of return. On BL616 QFN40, some pads simply do not exist, while BL618 QFN56 exposes more pins. Correct behavior should validate against the package-specific pin map, not assume every BL616/BL618-family build has the same bonded pads. [#21881540]

What would be the practical difference between an OpenBL616 build and a hypothetical OpenBL618 build for boards with extra pins and PSRAM?

The practical difference would be package-aware resources and pin exposure, not a completely different boot concept. The thread says the current firmware is already built as BL616, while the real issue was an SDK bug. A hypothetical OpenBL618 build would mainly need correct handling for the extra QFN56 pins and 4 MB PSRAM seen on the BL618 board. If the SDK handled package differences correctly, one codebase could still support both chips with the right board configuration. [#21881881]

How do you diagnose an SDK-side bug on Bouffalo Lab chips when Main_Init is not called but the firmware still crashes early in boot?

Treat it as an early boot or HAL fault and trace the exception address before app init. In the thread, the developer noted that Main_Init was not even called, which ruled out normal OpenBL616 startup code. They then mapped the failure to bflb_gpio_pad_check and concluded it was an SDK-side bug. That is the right pattern: confirm boot stage, inspect mepc, identify the exact SDK function, and then test a build with that trap removed or fixed. [#21881881]

Why was ADC temperature reading on BL616 changed to run every 10 seconds in PR #2092, and how can oversampling affect performance?

It was changed because ADC reads are expensive, especially with oversampling, and a 10-second interval is enough for temperature. The developer explained that on another supported chip, GD32VW553, maximum oversampling could take at least 0.25 s per measurement. That kind of delay can waste CPU time and hurt responsiveness if you poll too often. The same 10-second strategy was already used on XR806 and XR872, so PR #2092 applied a practical performance limit rather than chasing constant updates. [#21890541]

How did PR #2092 change OpenBK7231T_App for BL616 and other platforms, including binary size differences and BMP280/BMP180 build fixes?

PR #2092 bundled BL616-related fixes with broader cleanup across many targets. The author said it fixed BMP280 + BMPI2C compilation issues, fixed BMP180, reduced some binaries, and slightly increased others. Concrete examples include OpenECR6600 shrinking by 2988 bytes, OpenXR806 .img shrinking by 1024 bytes, and OpenXR806 OTA growing by 160 bytes. The same PR also moved some functions to headers and reduced ADC temperature polling frequency. Overall, it was a cross-platform maintenance PR, not a BL616-only patch. [#21890541]
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