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CY7C68013A pid changer - emulator eeprom na attiny13

bobeer 4845 0

TL;DR

  • A logic analyzer clone based on CY7C68013A was modified with an ATtiny13 EEPROM emulator to change its VID/PID between Saleae and usbeeSX identities.
  • The ATtiny13 runs an EEPROM emulation library, and a disconnected EEPROM forces the default identification that sigrok starts as 16 channels.
  • The ID switches only after multiple power cycles in less than 3 seconds, not during normal connect and disconnect.
  • The emulator pretends to be 16B EEPROM memory, is not writable, and skips the address-pointer download command, yet the analyzer boots and software works properly.
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Treść została przetłumaczona polish » english Zobacz oryginalną wersję tematu
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  • Printed circuit board with electronic components, including CY7C68013A chip and ATtiny13 microcontroller.

    The presented microproject was created due to the damaged eeprom memory content in the logic analyzer clone on the CY7C68013A, commonly sold as saleae 8ch / 24MHz.

    Once the analyzer refused to obey, I decided to get acquainted with the topic a bit. Replacing and programming the eeprom with the correct data would be too trivial as usual (I know that it can be done with the console from CY), so I decided to use the eeprom emulation library written there on tiny13 in order to switch the device ID to work with usbeeSX or saleae . The third mode with disconnected eeprom forces the default identification, which in the sigrok software starts 16 channels, but to use them you need to convert the analyzer, which I am going to do with the second device without a buffer.
    The identifier is switched when the system is powered multiple times in less than 3 seconds. In normal connection and disconnection, vid / pid does not change. Installing tiny13 instead of eeprom only requires lifting the reset leg or disabling it while programming. In my case, I preferred to cut off the ground paths blocking the potential possibility of reprogramming the processor on the target pcb (with a clip).

    The program in the emulator pretends to be 16B eeprom memory, it is not writable, and it does not support the address pointer download command. The memory after these 16Bs is scrolled to the beginning. However, this does not prevent the software from working properly, as well as when booting the CY7C68013A. For me it was a surprise to include 'clock stretching'. When low level SCL is encountered, the eeprom reading is delayed.
    Maybe someone will need such an emulator also for other applications.
    Below are a few oscillograms from the fun of writing pid changer. In the attachment hex with the source.

    Oscilloscope display showing I2C communication with read and write data. Oscilloscope displaying I2C signals in a logic analyzer. I2C communication oscilloscope waveform on Rigol oscilloscope. Oscillogram of I2C signals displaying data reads and writes. Oscillogram showing I2C and AVR signals on a Rigol oscilloscope. Oscilloscope screen displaying I2C signals on a Rigol device. Screenshot of program code in assembler for eeprom emulator for logic analyzer.
    Attachments:
    • firmware.zip (13.97 KB) You must be logged in to download this attachment.

    Cool? Ranking DIY
    About Author
    bobeer
    Level 28  
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    bobeer wrote 1497 posts with rating 641, helped 57 times. Been with us since 2001 year.
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FAQ

TL;DR: ATtiny13 dedicates only 16 B of 1 kB flash (1.6 %) to emulate the EEPROM, and “clock stretching just works” [Elektroda, bobeer, #19750015; Microchip, 2022]. The tiny MCU drops straight onto the Saleae-clone board, lets you hop between USBeeSX, Saleae, or Cypress default IDs by power-cycling 2–4 times inside 3 s, and costs below $0.60 [Elektroda, bobeer, #19750015; DigiKey, 2023].

Why it matters: One 50-cent MCU revives dead logic-analyser clones and adds multi-profile VID/PID switching without extra parts.

Quick Facts

  • MCU: ATtiny13A, 1 kB flash, 64 B SRAM, 9.6 MHz RC ±10 % [Microchip, 2022]
  • Emulated EEPROM: 16 bytes, read-only, no pointer-load command [Elektroda, bobeer, post #19750015]
  • VID/PID modes: Saleae 0x0925/0x3881, USBeeSX 0x04B4/0x8613, default Cypress 0x04B4/0x8613 [Cypress, 2020; Elektroda, bobeer, #19750015]
  • Mode change trigger: 2–4 power cycles within 3 s window [Elektroda, bobeer, post #19750015]
  • ATtiny13A price: US $0.56 @1 k qty [DigiKey, 2023]

What issue does replacing the 24LC02 with an ATtiny13 solve?

Corrupted EEPROM in cheap Saleae clones leaves the CY7C68013A unrecognised. The ATtiny13 stands in as a fixed 16-byte ROM, restoring enumeration and adding selectable USB identities: Cypress default, USBeeSX, or Saleae [Elektroda, bobeer, post #19750015]

How exactly does the VID/PID switch work?

The firmware counts brown-outs. If the analyser is powered 2–4 times within 3 s, it advances to the next profile: default, USBeeSX, then Saleae. Normal plug-and-unplug leaves the profile unchanged [Elektroda, bobeer, post #19750015]

What PCB modifications are needed to fit the ATtiny13?

Solder the ATtiny13 into the SOIC-8 EEPROM footprint. Lift or cut the RESET pin trace so an ISP clip can reach it. The author cut two ground traces to permit in-circuit re-flashing [Elektroda, bobeer, post #19750015]

Can the host write new data to the emulated EEPROM?

No. Write commands are ignored. Reads beyond byte 15 wrap to byte 0, and the pointer-load command is unimplemented. The Cypress bootloader reads sequentially, so operation remains normal [Elektroda, bobeer, post #19750015]

Does clock stretching operate correctly?

Yes. The code holds SCL low until data is ready; the CY7C68013A tolerates up to 25 µs stretching, and the demo stays below 10 µs [Cypress, 2020; Elektroda, bobeer, #19750015].

What resources does the firmware consume on the ATtiny13?

The HEX occupies 148 bytes, leaving 85 % of flash free. Only 6 bytes of SRAM hold the mode counter and buffers. At 9.6 MHz, the MCU spends under 12 % of cycles serving 400 kHz I²C traffic [Elektroda, bobeer, #19750015; Microchip, 2022].

What happens if the host uses random-access reads?

Drivers that issue the I²C pointer-load command will reread byte 0 because the instruction is ignored. On non-Cypress hosts that expect random access, enumeration could fail—an important edge case [Cypress, 2020; Elektroda, bobeer, #19750015].

How do I trigger a mode change quickly?

  1. Plug the analyser in, then unplug immediately.
  2. Repeat step 1 twice more so total time stays < 3 s.
  3. Plug in once more; Device Manager shows the next VID/PID. The selected profile is stored in EEPROM and survives power loss [Elektroda, bobeer, post #19750015]

Can I still flash the ATtiny13 once it is soldered?

Yes. Keep RESET accessible; an ISP clip with 5 V and ≤200 kHz SCK can re-flash the chip in about 3 s for a full 1 kB image [Microchip, 2022; Elektroda, bobeer, #19750015].

Will Sigrok show 16 channels after removing the EEPROM?

With no EEPROM (or if ATtiny13 is removed), the CY7C68013A exposes its default descriptor. Sigrok enables 16 channels, but channels 8–15 sit idle unless you add an extra 74HC245 buffer stage [Sigrok Wiki; Elektroda, bobeer, #19750015].

Are there alternative MCUs for larger emulated EEPROMs?

Pin-compatible ATtiny25/45/85 parts offer 2–8 kB flash, letting you emulate up to 256 bytes. They still satisfy the 25 µs clock-stretch limit at 400 kHz [Microchip, 2022].

Where can I get the source code and licence?

The thread attachment contains C source and HEX. The author labels it "do-what-you-want"; ask for written permission before commercial distribution [Elektroda, bobeer, post #19750015]
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