No, I sent them with audio packets but the resolution is set to 640x480 so the bezel is torn. If there is no audio package, things are easy to do. Understandably, you let NES linger so he can catch the timing right. If you share your snap code, I would appreciate your help
Hi, I have recently built this and have enjoyed doing so, but I seem to have an issue whenever I try to load a .rom. I have to browse the SD card to the location and then manually select, otherwise I get an error like:
FLASH: file missing!
KICK31SD.ROM
No matter where I put the rom files or upper/lowercase they never seem to find them.
Thank you for the speedy upload, it is appreciated.
A couple of questions?
1, I am having issues with hanging when copying over files from my 3.0 or 3.1 workbench disks when the system asks for a valid workbench disk. It hangs forever and corrupts the disk on reset.
I have noticed the Max Transfer isn't set to recommended settings, could this be the issue?
2, I do not own a PS/2 mouse, just keyboard(pain to navigate), Is it possible to use an Amiga mouse in a DB9 port?
@piotr_go congratulations on the next installment of the project ;)
As a total layman in FPGA systems, I have a few questions, and I am still before the stage of blinking the diode Let's assume that I would like to run DIY-a586 on e.g. tango nano 9k, how do I know that the FPGA data is sufficient to simulate the given peripherals? Is every FPGA able to simulate transmission lines like HDMI or displayport i2s on its I/O ports if there are no dedicated function blocks for this purpose? What is the case of transferring one batch, e.g. written under XC6SLX9 to, for example, Cyclone I/II/III or others? What should you really be guided by when choosing a given FPGA, apart from the number of LUT elements? From what I checked, systems that have more than 25k logical units are usually already in BGA housings, hence my question, could it not be possible to separate functional blocks into smaller FPGAs? e.g. tango nano 9k only for graphics, and other smaller ones for the CPU and other peripherals? What bus should these systems be connected to make everything work properly?
how do you know that the FPGA data is enough to simulate the given peripherals?
Only synthesis gives 100% certainty. It's hard to tell with a complex design. With CPLD you could count.
Hetii wrote:
Is every FPGA able to simulate transmission lines like HDMI or displayport i2s on its I/O ports if there are no dedicated function blocks for this purpose?
Must be serializers. Too much speed to do without them.
Hetii wrote:
What is the case of transferring one batch, e.g. written under XC6SLX9 to, for example, Cyclone I/II/III or others?
You have to rewrite the blocks specific to your layout. (PLL/IO/...)
Hetii wrote:
What should you really be guided by when choosing a given FPGA, apart from the number of LUT elements?
Speed, BRAM, serializers...
Hetii wrote:
systems that have more than 25k logical units are usually already in BGA housings, hence my question, would it not be possible to separate functional blocks into smaller FPGAs?
Then the number of IO will become a problem, and we return to BGA