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TL;DR LABEL_AI_GENERATED

  • DIY-A586 v1.9 is a revised FPGA board built around a Spartan6 XC6SLX9, with hardware changes accumulated over several years.
  • It removes joystick multiplexing, supports two floppy drives without extra circuits, and adds an 18.432MHz generator plus USB-C pull-downs.
  • The board uses 32MB 16bit SDRAM, 16MB flash, and stores up to 30 FPGA configurations in flash.
  • Mikan core runs with 8MB CHIP and 23.5MB FAST, and the 8MB DMA CHIP unexpectedly worked.
  • Diagram, Gerberas, and commercial-use restrictions are included in the appendix.
AI summary based on the discussion. May contain errors.
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  • Purple PCB named DIY A586 with various electronic components, connectors, and a SIM card. DIY-A586 v1.9 by piotr_go

    Hello
    I would like to present the 1.9 DIY-A586 version, with the modifications that have come to my mind over the years. I skipped a few numbers so that I would not be tempted by another v1.x from XC6SLX9 :) .
    Differences: 32MB RAM, JOY1 / 2 without multiplexing, 2 flopps without additional circuits, 18.432MHz generator, space for THT LEDs, 5k1 USB-C pull-downs, various minor fixes.

    The board has:
    - FPGA Spartan6 XC6SLX9
    - 32MB 16bit SDRAM memory
    - 16MB flash for core and ROMs
    - HDMI output
    - analog audio output + tape recorder input
    - SD slot
    - RS232
    - 2 * joystick port
    - 2 * PS / 2
    - A500 keyboard connector
    - floppy disk drive connectors
    - 2 buttons (menu and reset)
    - 2 LEDs
    - 5V USB-C power socket
    - dimensions 100x100mm

    There are up to 30 configurations in flash that can be loaded into an FPGA.

    DIY-A586 v1.9 by piotr_go DIY-A586 v1.9 by piotr_go DIY-A586 v1.9 by piotr_go DIY-A586 v1.9 by piotr_go





    Mikan core (8MB CHIP, 23.5MB FAST) :
    DIY-A586 v1.9 by piotr_go DIY-A586 v1.9 by piotr_go
    I thought it would fail, but somehow the 8MB DMA CHIP came in.

    Diagram and gerberas in the appendix.
    Commercial use prohibited.
    Attachments:
    • piotr_go DIY-A586 v1.9.tar.gz (1.45 MB) You must be logged in to download this attachment.

    Cool? Ranking DIY
    About Author
    piotr_go
    DIY electronics designer
    Offline 
    piotr_go wrote 2910 posts with rating 3352, helped 94 times. Been with us since 2003 year.
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  • #2 20006751
    Baskhaal
    Level 20  
    Posts: 397
    Help: 22
    Rate: 182
    Cool thing! I feel the subject in my free time.
    If you want to do a mass show ;) then let me know, I will do and SMT and THT at a good price.
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  • #4 20007739
    piotr_go
    DIY electronics designer
    Posts: 2910
    Help: 94
    Rate: 3352
    Own core.
  • #5 20007809
    tronics
    Level 38  
    Posts: 5082
    Help: 359
    Rate: 845
    Softcore CPU and Chipset as I understand it? Is the CPU with any of the existing solutions?
  • #6 20007825
    katakrowa
    Level 23  
    Posts: 902
    Help: 9
    Rate: 855
    piotr_go wrote:
    Own core.

    All including own CPU implementation?
  • #7 20007834
    piotr_go
    DIY electronics designer
    Posts: 2910
    Help: 94
    Rate: 3352
    TG68, like in core with minimig, all the rest is mine.
    If I find time, I will replace it with something of my own.
  • #8 20007842
    katakrowa
    Level 23  
    Posts: 902
    Help: 9
    Rate: 855
    piotr_go wrote:
    If I find time, I will replace it with my own.

    M68000 is not a Z80, however, that in three afternoons you can write your own implementation, but I wish you perseverance and a lot of fun while writing :-)
  • #9 20007849
    piotr_go
    DIY electronics designer
    Posts: 2910
    Help: 94
    Rate: 3352
    katakrowa wrote:
    The M68000 is not the Z80, however, that you can write your own implementation in three afternoons

    It is quite simple compared to "playing" with the cycle consistency of the rest of the core.
  • #10 20007854
    tronics
    Level 38  
    Posts: 5082
    Help: 359
    Rate: 845
    And how is the compatibility at the moment? Are there any bugs in demos or games, are they all right?
  • #11 20007860
    piotr_go
    DIY electronics designer
    Posts: 2910
    Help: 94
    Rate: 3352
    As for the games, I deleted what I noticed.
    I have not tested the dem.
  • #12 20008158
    Macosmail
    Level 35  
    Posts: 2862
    Help: 227
    Rate: 863
    A very nice device :-) SysInfo shows only 2 MIPS at 98 MHz? Workbench works quite lively. Screen operations faster than original ECS / AGA chips?
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  • #13 20008216
    piotr_go
    DIY electronics designer
    Posts: 2910
    Help: 94
    Rate: 3352
    Macosmail wrote:
    SysInfo shows only 2 MIPS at 98 MHz?

    I suspect it's because of the faster memory. In the original DMA takes most of the bandwidth.

    Macosmail wrote:
    Screen operations faster than original ECS / AGA chips?

    I also had such an impression (compared to the bare 1200).
    Lotus III runs fairly smoothly.
  • #14 20041337
    samowitsch
    Level 7  
    Posts: 11
    Hi Piotr. Is a Winbond W9825G6KH-5 absolutely necessary or can it also be a W9825G6KH-6?
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  • #15 20041496
    Ondo
    Level 12  
    Posts: 104
    Help: 3
    Rate: 17
    Beautiful job, at first glance I thought it was some Virtex, and the Spartan was enough. How many FPGAs does the entire project take?
  • #16 20041536
    piotr_go
    DIY electronics designer
    Posts: 2910
    Help: 94
    Rate: 3352
    Amiga - 100%
  • #17 20041565
    Ondo
    Level 12  
    Posts: 104
    Help: 3
    Rate: 17
    100% FPGA resources? With all due respect, you are probably a miracle worker, good projects tailored to specific FPGA blocks reach 60-70% of resources.
  • #18 20041804
    piotr_go
    DIY electronics designer
    Posts: 2910
    Help: 94
    Rate: 3352
    samowitsch wrote:
    Is Winbond W9825G6KH-5 absolutely necessary or can it also be W9825G6KH-6?

    It should work, but I haven't tested it.

    Ondo wrote:
    100% FPGA resources?

    Usually it does not fit, depends on the whim of the synthesis.
  • FPGA utilization depends on synthesis and routing

    #19 20042227
    Ondo
    Level 12  
    Posts: 104
    Help: 3
    Rate: 17
    piotr_go wrote:
    Ondo wrote:
    100% FPGA resources?

    Usually it does not fit, depends on the whim of the synthesis.
    It's normal to have to trim, but I mean the utilization level of the chip, the ISE spits out a synthesis result showing what percentage of resources are unused due to lack of routing or unused resources (memory, multipliers, DCM etc). It signifies a bit how a design is optimized for a specific FPGA, or how a particular FPGA is good for a specific task.
  • 99% LUT utilization leaves no room

    #20 20042329
    piotr_go
    DIY electronics designer
    Posts: 2910
    Help: 94
    Rate: 3352
    Ondo wrote:
    It's normal to cut

    Often it is enough to rename a signal or some other nonsensical modification.

    Ondo wrote:
    I mean the level of utilization of the system

    Code: Dos
    Log in, to see the code
  • ISE area optimization settings to fit oversized designs

    #21 20042349
    __Grzegorz__
    Level 30  
    Posts: 1415
    Help: 196
    Rate: 233
    Projects in ISE can be stuffed with a "shoe" using "Project" -> "Design Goals and Strategies".
    There is an "Area" option which sometimes works wonders.
    It spoils the timings a bit, but ... it is :)

    It allowed to cram into the SLX9 a project that, after synthesis, had 111% of the resource occupancy :)

    You can troubleshoot with
    - Synthesis: "Optimization Goal" (changed to Area),
    - Mapping: "Combinatorial Logic Optimalization" (enable)
    - Mapping: "Global Optimization" set to "Area"
    - Mapping: "Allow Logic Optimization Across Hierarchy"
    - Mapping: "LUT Combining" to Area
    - Mapping: "Maximum compression" - it can take ages unfortunately
    - Mapping: "Map Slice Logic into unused BlockRAM" - as long as you have free BLOCKRAM
  • #22 20042608
    piotr_go
    DIY electronics designer
    Posts: 2910
    Help: 94
    Rate: 3352
    __Grzegorz__ wrote:
    There is an "Area" option which sometimes works wonders.

    This occupation is after this wonder :)
  • #23 20047658
    samowitsch
    Level 7  
    Posts: 11
    piotr_go wrote:
    samowitsch wrote:
    Is a Winbond W9825G6KH-5 absolutely necessary or can it also be a W9825G6KH-6?

    It should work, but I haven't tested it.
  • #24 20048233
    piotr_go
    DIY electronics designer
    Posts: 2910
    Help: 94
    Rate: 3352
    Mouser. I bought a few pcs last year.
  • #25 20165605
    mopplayer6
    Level 2  
    Posts: 3
    Hi piotr_go
    I use Lichee Tang Primer to transmit HDMI with audio but packages seem to have some issues. Could you please share how to transfer audio via HDMI to Lichee Tang Primer?
  • Efinix T20Q144 as XC6SLX9 replacement

    #26 20165795
    __Grzegorz__
    Level 30  
    Posts: 1415
    Help: 196
    Rate: 233
    And also regarding the FPGA occupancy:
    instead of the XC6SLX9 I suggest using the EFINIX T20Q144.

    I'm just transferring my projects to this chip.
    It has ~ 50% more logic, something that I had to stuff into the SLX9, it goes into the T20Q144 without any problems.
    Light environment, no simulator, but if you organize modelsim, no problem :)
    Scalak has dedicated LVDS I / O, which are limited when it comes to using them as I / O, and slightly less dedicated clock inputs.

    T20Q144 are in digikeyu, in "normal" money.
  • Cyclone 4 version planned with more I/O and AGA support

    #27 20165930
    piotr_go
    DIY electronics designer
    Posts: 2910
    Help: 94
    Rate: 3352
    @__Grzegorz__
    It looks interesting, but not enough IO. In my spare time, I read about him. Is the Linux version soft?
    I promised myself that the next version 1.xx will not be created, and versions 2.xx will have a lot of stock, even with AGA + 68020.
    At the moment 2.0 is on Cyclone 4 (22320 LEs). Arrow starters are waiting in the queue, with even larger FPGAs, bought in the promotion for pennies.

    @ mopplayer6
    I'm sending in analog, fewer problems :)
    What's the problem?
  • #28 20165959
    __Grzegorz__
    Level 30  
    Posts: 1415
    Help: 196
    Rate: 233
    piotr_go wrote:
    Is the Linux version soft?

    Is.
    Quote:
    Linux environments:
    - Operating system:
    - Ubuntu v18.04 or later
    - Red Hat Enterprise x86-64 v7.4 or later
    - CentOS x86-64 v7.4 or later
  • #29 20167857
    mopplayer6
    Level 2  
    Posts: 3
    Hi @piotr_go
    My problem is that the lowest resolution in the HDMI standard is 640x480.
    The NES was 512x480, how could I send the packet with audio and HDMI requirement?
    I can see your video may work properly, can you please share how to do it?
  • #30 20167885
    piotr_go
    DIY electronics designer
    Posts: 2910
    Help: 94
    Rate: 3352
    I'm guessing at 640x480 you don't have room for audio packets?
    Try stopping the NES clock on each line (before or after the image) to make them longer :) I did just that.
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Topic summary

LABEL_AI_GENERATED
Discussion of the DIY-A586 v1.9 FPGA-based Amiga-compatible board by piotr_go, built around a Spartan-6 XC6SLX9 with 32 MB SDRAM, 16 MB flash, HDMI, analog audio, SD, RS232, joystick, PS/2, floppy and A500 keyboard interfaces. The thread covers core architecture (own core with TG68 CPU), compatibility, FPGA resource usage, synthesis constraints, and comparisons with Minimig/MiSTer. A large part of the discussion focuses on assembly and bring-up: flash programming, ROM loading, SD card formatting, Kickstart patches, floppy-drive conversion, Gotek compatibility, SDRAM timing, oscillator choice, and soldering order. Later posts report fixes and updates for Amiga core, SD support, PS/2 reset, floppy reading, audio, and bitplane handling, plus questions about parts sourcing, connector footprints, and possible future ports or expansions such as AGA, C64, Spectrum, and alternative FPGA platforms.
AI summary based on the discussion. May contain errors.
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