I am a complete newbie to NAND chips and would appreciate some basic information. Can this device and software format a chip and copy some files to it? Can it read a K9K4G08U0M-Y TSOP1 from an old MP3 player.
>>21254883 Personally I would like the new edition to come out at the end of December 2024.
Added after 2 [hours] 32 [minutes]:
russell_nash wrote:
I am a complete novice to NAND chips and would appreciate some basic information. Can this device and software format the chip and copy files onto it? Can it read the K9K4G08U0M-Y TSOP1 from an old MP3 player.
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This type of programmer and others like it deal with reading and writing data at the lowest level, which means that it reads and writes but raw data.
In order to access the files, it would be necessary to use a special application (without the programmer) which is able to search such raw data (so-called BIN, or DUMP) and extract from it the file system, and then the files.
I am a complete newbie to NAND chips and would appreciate some basic information. Can this device and software format a chip and copy some files to it? Can it read a K9K4G08U0M-Y TSOP1 from an old MP3 player.
So, the answer is no? I have the firmware for this particular MP3 player, it is a whole collection of files. Is there some way that I could plug this adapter into a computer, format a new chip to FAT16 as the original chip is, and copy these files to its root folder? Reading the old chip is not so important, it is damaged anyway which is why the MP3 player doesn't work.
>>21267535 for each mp3 player there is a utility that supports work with its processor, look for the program for your processor and then you will be able to decompose your mp3 player into molecules, the programmer in this topic does not work as you need, with it you could only write the image of the working dump in your flash drive if it supported it, at the moment you do not have a working dump and the programmer does not support the type of your flash drive, so your way is to look for software that will write the files you need through your processor
>>21267570 the processor of the player itself will flash the flash if you find a program for its processor and working files, search the forums for restoring mp3 players, there is a lot of information on this topic
Hello all
Here accidentally found this forum usefull for those who want to build one nand flasher. I own multiple flashers :teensy2++ teensy4.0 ,progskeet 1v1 , 1,21 , tnm5000 ,flashcat .
i can build this and test to see speed and willing to recommand it to ps3 comunity if this have decent speed for his cost.
Teensy2++ read 20mins,-write 20 mins raw data 135mb like ( wark soldered on board without take nand ic out of ps3 mobo)
Progskeet 1v1,1.21 read 5mins write 11mins (work on ps3 mobo,no need to desolder from mobo)
Tnm5000 :2 min read ,4 min write only out of mobo
now questions are : did someone here try it read on mobo in parralel and out of mobo to compare speed?
is there a list of supported devices?
Im just a tech that helped to development ps3 Frankenstein mod. we can shift some bits in eeprom(syscon) to swap old gpu with a newer revision.
Hi Funak.
How can I write specific addresses to NAND using NanoLite?
Macronix MX30LF1G18AC
u-boot 0x000000700000-0x000000900000
UBI 0x000000c00000-0x000007c00000
Nand comes from router.
Witam drogi funak,
Napisałem program do obliczania kodu ECC 42 bajty dla Samsung UExxD5700 z K9GAG08U0E-SIB0 i działa. Niestety kod ECC 42 bajty nie pasuje. Albo prim_poly z 0x402b nie pasuje, albo eccmask z np. 0x00 nie pasuje, albo or....
Czy możesz wskazać mi właściwy kierunek?
Zrozumiałem, że Ty również miałeś z tym problem.
Moje dane obliczeniowe.
m=14
t=24 bity na 1024 bajty
.eccbytes = 336 bitów lub 42 bajty
Wielomian 0x402b. Obliczyłem również z 0x4443, ale to nie działa.
You are close, 0x402b is the correct polynomial.
Pay attention to which data you are taking for the calculation.
For a start, consider 0xFF and 0x00 alone, then it will be easier for you to find which data is used in the calculation.
Added after 44 [seconds]: .
radek97 wrote:
Could you please provide a link to the latest software version for the NAND LITE??
I am enclosing an actual reading of some key contents of the NAND memory page, from which you can understand from which data the BCH is calculated.
Let me hint that it is not 1024 bytes
Is it possible to add the chip to the database:
AFND5608U1-CKAK technical documentation I could not find only info from some program from another programmer.
1. Zatem 0x402b jest prawidłowym wielomianem.
2. Dane, na podstawie których obliczany jest BCH, składają się z 1024 bajtów + 12 bajtów informacyjnych = 1036 bajtów.
3. Procesor SEMS-21 odczytuje dane w następujący sposób: w zrzucie b0000 0101, jest obliczane jako b1010 0000.
Unfortunately I don't have the full documentation for the TH58NVG2S3HTAIO.
I only found that it is 4Gb but as 2x2Gb. Does that define the chip as 2Gb and LUN=2.
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On the other hand, I have no idea what to set here:
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And is it possible to save this newly defined layout ?
It agrees with the zero at the end of the PN. Nevertheless, it does not add much.
edit: I have two new memory sticks to which I wanted to record the ripped content. Both of them report errors during writing and erasing (Bad Block ?). What to do in this case ? I don't think there is a way to use such memories by programming them in progamator ?
AI info:
The image shows the basic parameters of the NAND flash memory organisation for a given LUN (Logical Unit Number). Here is how to read these values:
Spoiler:
LUN (Logical Unit Number) in NAND flash memories refers to the logical unit of memory within the memory chip. It is a way of organising the address space in modern storage devices such as SSDs.
Details of LUNs in NAND flash:
NAND memory hierarchy
A NAND flash chip consists of matrices (dies) that contain multiple memory blocks.
Each die can be divided into one or more LUNs.
Each LUN contains its own sets of memory blocks and pages.
LUN function in NAND memories
LUNs enable parallel operations on different memory areas to increase performance.
In advanced SSD controllers, operations can be performed on multiple LUNs simultaneously to improve read/write throughput.
LUNs vs. NAND channels
In SSDs, NAND memories are often organised into channels, and each channel can support multiple LUNs.
This makes better use of the interface bandwidth (e.g. NVMe, SATA).
Practical application
In NAND flash-based SSDs, the controller can manage multiple LUNs at the same time, allowing for parallel operations and increased performance.
In Enterprise SSD systems, it is common to find designs with multiple LUNs per NAND die.
In summary, a LUN in NAND flash memory is a logical unit of memory that enables more efficient data management and increased performance of write and read operations.
LUN size: 2048 block
Indicates that a given LUN consists of 2048 blocks of memory.
Block size: 64 pages
Each block contains 64 pages of memory.
Page size: 2048 + 128 bytes
Each page consists of 2048 bytes of user data and an additional 128 bytes (usually for ECC error correction and metadata).
Memory organisation calculations:
Capacity of one block = 64 pages × (2048 + 128) bytes
= 135168 bytes (132 KB)
Total capacity of LUN = 2048 blocks × 135168 bytes
= 276.48 MB
This means that each LUN has a capacity of approximately 276 MB and the memory is divided into logical units (blocks and pages), allowing the controller to manage read and write operations efficiently.
Yes, this can be visualised as a hierarchical NAND flash memory structure, where memory is divided into logical units (LUN → Blocks → Pages → Bytes).
Memory partitioning:
LUN = contains 2048 blocks.
Each block = consists of 64 pages.
Each page = has 2048 bytes of data + 128 bytes for ECC and metadata.
In this way, the data in the NAND memory is organised and managed by the SSD controller to optimise reading and writing and to increase the durability of the memory.
These are obvious values - that's not what the question was about.
AI says that:
TH58NVG2S3HTAI0 memory is a 4 Gbit (512 MB) Single-Level Cell (SLC) NAND flash chip manufactured by Kioxia (formerly Toshiba). The organisation of this memory is 512M x 8, which means 512 megabits on an 8-bit data bus. This chip uses a parallel interface and is available in a 48-TSOP I package. The supply voltage range is 2.7 V to 3.6 V and the access time is 25 ns.
DIGIKEY.COM
The detailed internal organisation of this memory is not directly available from public sources . However, considering the standard structures for NAND SLC memories of similar capacity, the following hierarchy can be assumed:
LUN (Logical Unit Number): 1 .
Blocks: 2048 blocks
Pages per block: 64 pages
Page size: 2048 bytes of data + 128 bytes of auxiliary area (typically used for ECC error correction and metadata)
This organisation is typical of 4 Gbit NAND SLC memory and allows efficient management of read and write operations. However, please note that the exact parameters may vary depending on the specific model and manufacturer.
For precise information, it is recommended to consult the manufacturer's official documentation or contact your Kioxia / Toshiba representative directly
The discussion centers on the development and use of a low-cost Flash NAND memory programmer designed specifically for TSOP48 packaged NAND Flash chips. The programmer targets applications such as reading and programming NAND Flash from devices like flash drives, TVs, routers, and modems, offering an affordable alternative to expensive professional tools. The design includes a permanently soldered TSOP48 socket and uses an FT245 USB interface combined with an Atmel XMEGA microcontroller for flexible control and hardware timing measurements. Software development focuses on supporting various NAND Flash memory types, including multi-die ("4 die") memories, and implementing error correction algorithms such as BCH capable of correcting multiple bit errors per 512-byte sector. The NANDLite application supports reading, writing, erasing, and batch uploading of NAND dumps for analysis and algorithm improvement, including handling bad block tables (BBT) and ECC data correction. Specific NAND Flash models like Samsung K9GAG08U0E and Toshiba TC58NVG6T2FTA00 are extensively tested, especially in relation to Samsung D5500 series TVs. Challenges discussed include addressing discontinuous memory spaces, bad block management, different addressing schemes (e.g., Toshiba's additional page addressing commands), and the complexity of NAND file systems like UBIFS. The project is evolving with plans for faster data transfer rates (up to 50MB/s in future versions), improved software interface, multilingual support, and expanded memory support including eMMC in the future. Comparisons with commercial programmers such as RT809H and Lens-Men highlight differences in speed, functionality, and openness of software. The community contributes NAND dumps for analysis to enhance error correction and bad block handling algorithms. The discussion also touches on hardware considerations like the quality of Chinese TSOP48 sockets, USB driver compatibility (including Windows XP support), and the limitations of TSOP48 packaging as industry shifts toward BGA and FBGA packages, suggesting ISP programming as a future direction. Summary generated by the language model.
