What do you think about making a circuit as follows
1 main processor ESP32 S3 N16R8 radio Evo3
2.2 ESP32 S3 N16R8 processor Graphic equalizer with spectrum analyzer controlled from the main processor via uart
3 BT AUDIO ESP32 WROM transmitter controlled from the main processor via uart2
A PCM9211 could be added before the equalizer to feed other digital signals.
1. Main audio structure
ESP32-S3 EVO3 RADIO
radio, Wi-Fi, web, TFT/OLED, SD, remote control, BT control
|
| I2S raw from the radio
| DATA / BCK / LRC / optionally MCLK
v
PCM9211
source selection:
RADIO I2S / BT I2S / SPDIF / AUX / future inputs
|
| I2S selected source
| DATA / BCK / LRC
v
ESP32-S3 N16R8 DSP
equalizer 20 Hz ... 20 kHz
preamp, limiter, spectrum analyser, VU
|
| DATA after equalization
| BCK and LRC common with PCM9211
v
PCM5102A DAC
|
v
audio amplifier
1. ESP32-S3 EVO3 RADIO → PCM9211 as AUXIN0
This is the correct connection for internet radio.
ESP32-S3 EVO3 PCM9211 pin Name PCM9211 pin Function in project
GPIO13 28 RXIN7 / ADIN0 I2S DATA from radio
GPIO14 29 RXIN6 / ALRCKI0 I2S LRC / LRCK
GPIO12 30 RXIN5 / ABCKI0 I2S BCK
GPIO2 optional 31 RXIN4 / ASCKI0 I2S MCLK / SCK optional
GND common ground
So on the PCB describe it like this:
PCM9211 AUXIN0 / RADIO
pin 28 RXIN7/ADIN0 <- RADIO DATA
pin 29 RXIN6/ALRCKI0 <- RADIO LRCK
pin 30 RXIN5/ABCKI0 <- RADIO BCK
pin 31 RXIN4/ASCKI0 <- RADIO MCLK optional
Here an earlier description was good.
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2. Bluetooth I2S → PCM9211 as AUXIN1
Here the names need to be corrected. There are no pins described as ADIN1 on the chassis. There are pins MPIO_C0...MPIO_C3. When group C is configured as AUXIN1 they get the functions ASCKI1 / ABCKI1 / ALRCKI1 / ADIN1.
BT PCM9211 module pin Physical name of pin Function after configuration
BT MCLK if present 7 MPIO_C0 ASCKI1
BT BCK 8 MPIO_C1 ABCKI1
BT LRC 9 MPIO_C2 ALRCKI1
BT DATA OUT 10 MPIO_C3 ADIN1
GND GND ground
On the PCB schematic, sign it like this:
PCM9211 AUXIN1 / BT
pin 7 MPIO_C0 / AUXIN1_SCK
pin 8 MPIO_C1 / AUXIN1_BCK
pin 9 MPIO_C2 / AUXIN1_LRCK
pin 10 MPIO_C3 / AUXIN1_DATA
And in the PCM9211 software you have to set group C as AUXIN1. According to the datasheet, the MPIO_C group with MPCSEL = 000 works as AUXIN1, i.e. ASCKI1 / ABCKI1 / ALRCKI1 / ADIN1. This is also the default setting after a reset.
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3. Additional I2S input → PCM9211 as AUXIN2
Name correction here too. There are MPIO_B0...MPIO_B3 pins on the chassis.
External I2S source PCM9211 pin Physical pin name Function after configuration
MCLK if present 11 MPIO_B0 ASCKI2
BCK 12 MPIO_B1 ABCKI2
LRC 13 MPIO_B2 ALRCKI2
DATA 14 MPIO_B3 ADIN2
GND GND GND ground
On the PCB schematic, sign:
PCM9211 AUXIN2 / EXT_I2S
pin 11 MPIO_B0 / AUXIN2_SCK
pin 12 MPIO_B1 / AUXIN2_BCK
pin 13 MPIO_B2 / AUXIN2_LRCK
pin 14 MPIO_B3 / AUXIN2_DATA
The MPIO_B group with MPBSEL = 000 works as AUXIN2, i.e. ASCKI2 / ABCKI2 / ALRCKI2 / ADIN2. This is also the default setting.
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4. PCM9211 → ESP32-S3 DSP
This is the main output of the PCM9211. Here the pins are exactly as shown in your picture.
PCM9211 pin Name PCM9211 ESP32-S3 DSP Function
17 DOUT GPIO11 DATA IN to DSP
18 LRCK GPIO10 LRC / LRCK
19 BCK GPIO9 BCK
20 SCKO test pad / MCLK / SCK optionally
GND GND GND ground
Description on PCB:
PCM9211 MAIN OUT
pin 17 DOUT -> DSP GPIO11 DATA_IN
pin 18 LRCK -> DSP GPIO10 LRC
pin 19 BCK -> DSP GPIO9 BCK
pin 20 SCKO -> TP_SCKO / optionally DSP MCLK
The PCM9211 has routing of DIR, ADC, AUXIN0, AUXIN1, AUXIN2 sources to the main output. Selection of the main output is via register 6Bh, and muting and Hi-Z is via registers 6Ah and 6Dh.
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5. PCM9211 I2C control from EVO3
That was almost right, just adding exactly according to the pinout.
ESP32-S3 EVO3 PCM9211 pin Pin name Function
GPIO4 24 MDI/SDA I2C SDA
GPIO5 25 MC/SCL I2C SCL
GPIO6 34 RST reset PCM9211, active LOW
GPIO7 optional 1 ERROR/INT0 error / interrupt
GPIO7 optional 15 MPO0 e.g. LOCK after configuration
3V3 or GND via jumper 23 MDO/ADR0 I2C address ADR0
3V3 or GND via jumper 26 MS/ADR1 I2C ADR1 address
GND 27 MODE I2C selector
For I2C the MODE pin must be connected to DGND. If you give MODE to VDD, the chip will go into SPI. The PCM9211 attempts this state on startup or reset, so don't treat this as just a GPIO.
The I2C address is:
10000 ADR1 ADR0
That is:
ADR1 ADR0 address 7-bit
0 0 0x40
0 1 0x41
1 0 0x42
1 1 0x43
Therefore, it is best to give solder jumpers for ADR0 and ADR1 on the PCB. The PCM9211 supports I2C as a slave and the address has first bits 10000 plus ADR1 and ADR0.
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6. SPDIF / optical inputs
This also needs to be described according to the real names.
Coax SPDIF
Input PCM9211 pin Pin name
COAX 1 37 RXIN0
COAX 2 35 RXIN1
power supply RX coax 36 VDDRX
rX coax ground 38 GNDRX
RXIN0 and RXIN1 have a built-in coaxial input amplifier and VDDRX supplies this part of the receiver.
Optical / TOSLINK SPDIF
Optical input PCM9211 pin Pin name
Optical 1 DATA 33 RXIN2
Optical 2 DATA 32 RXIN3
Optical 3 optional 31 RXIN4 / ASCKI0 if not using AUXIN0 SCK
Optical 4 optional 30 RXIN5 / ABCKI0 if not using AUXIN0
Optical 5 optional 29 RXIN6 / ALRCKI0 if not using AUXIN0
Optical 6 optional 28 RXIN7 / ADIN0 if you do not use AUXIN0
In our case RXIN4...RXIN7 are occupied by AUXIN0 RADIO, so for TOSLINK leave RXIN2 and RXIN3 realistically.
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7. Corrected netlist of the main audio path
NET_RADIO_DATA:
ESP32_EVO3 GPIO13
PCM9211 pin 28 RXIN7/ADIN0
NET_RADIO_LRCK:
ESP32_EVO3 GPIO14
PCM9211 pin 29 RXIN6/ALRCKI0
NET_RADIO_BCK:
ESP32_EVO3 GPIO12
PCM9211 pin 30 RXIN5/ABCKI0
NET_RADIO_MCLK_OPTION:
ESP32_EVO3 GPIO2
PCM9211 pin 31 RXIN4/ASCKI0
NET_BT_I2S_MCLK_OPTION:
BT_MODULE MCLK
PCM9211 pin 7 MPIO_C0 / AUXIN1_SCK
NET_BT_I2S_BCK:
BT_MODULE BCK
PCM9211 pin 8 MPIO_C1 / AUXIN1_BCK
NET_BT_I2S_LRCK:
BT_MODULE LRCK
PCM9211 pin 9 MPIO_C2 / AUXIN1_LRCK
NET_BT_I2S_DATA:
BT_MODULE DATA_OUT
PCM9211 pin 10 MPIO_C3 / AUXIN1_DATA
NET_EXT_I2S_MCLK_OPTION:
EXT_I2S MCLK
PCM9211 pin 11 MPIO_B0 / AUXIN2_SCK
NET_EXT_I2S_BCK:
EXT_I2S BCK
PCM9211 pin 12 MPIO_B1 / AUXIN2_BCK
NET_EXT_I2S_LRCK:
EXT_I2S LRCK
PCM9211 pin 13 MPIO_B2 / AUXIN2_LRCK
NET_EXT_I2S_DATA:
EXT_I2S DATA
PCM9211 pin 14 MPIO_B3 / AUXIN2_DATA
NET_PCM9211_MAIN_DOUT:
PCM9211 pin 17 DOUT
DSP_ESP32 GPIO11
NET_PCM9211_MAIN_LRCK:
PCM9211 pin 18 LRCK
DSP_ESP32 GPIO10
PCM5102A LRC via jumper 0R
NET_PCM9211_MAIN_BCK:
PCM9211 pin 19 BCK
DSP_ESP32 GPIO9
PCM5102A BCK via jumper 0R
NET_PCM9211_MAIN_SCKO_OPTION:
PCM9211 pin 20 SCKO
test pad TP_SCKO
NET_DSP_DATA_OUT_EQ:
DSP_ESP32 GPIO12
PCM5102A DIN
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8. Note to the connection of the DSP with the PCM5102A
Here I would leave the 0 Ω jumpers on the PCB, because we have two possible clock variants.
Variant A, which we described:
PCM9211 BCK -> DSP GPIO9 and PCM5102A BCK
PCM9211 LRCK -> DSP GPIO10 and PCM5102A LRC
DSP GPIO12 -> PCM5102A DIN
This variant only works if the DSP correctly transmits DATA_OUT synchronised to the external BCK/LRCK.
Variant B, safer to run:
PCM9211 DOUT/BCK/LRCK -> DSP input I2S
DSP generates its own BCK/LRCK/DATA -> PCM5102A
For the first prototype PCB I recommend giving jumpers:
JP_BCK_DAC:
position 1: BCK with PCM9211
position 2: BCK with DSP_TX
JP_LRCK_DAC:
position 1: LRCK with PCM9211
position 2: LRCK with DSP_TX
This way you won't get blocked if the ESP32-S3 DSP requires a separate I2S TX with its own clock.
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9. Corrected PCM9211 pin description for the schematic
This is how I would describe the symbol in KiCad/Eagle:
1 ERROR/INT0
2 NPCM/INT1
3 MPIO_A0
4 MPIO_A1
5 MPIO_A2
6 MPIO_A3
7 MPIO_C0 / AUXIN1_SCK
8 MPIO_C1 / AUXIN1_BCK
9 MPIO_C2 / AUXIN1_LRCK
10 MPIO_C3 / AUXIN1_DATA
11 MPIO_B0 / AUXIN2_SCK
12 MPIO_B1 / AUXIN2_BCK
13 MPIO_B2 / AUXIN2_LRCK
14 MPIO_B3 / AUXIN2_DATA
15 MPO0
16 MPO1
17 DOUT
18 LRCK
19 BCK
20 SCKO
21 DGND
22 DVDD
23 MDO/ADR0
24 MDI/SDA
25 MC/SCL
26 MS/ADR1
27 MODE
28 RXIN7/ADIN0
29 RXIN6/ALRCKI0
30 RXIN5/ABCKI0
31 RXIN4/ASCKI0
32 RXIN3
33 RXIN2
34 RST
35 RXIN1
36 VDDRX
37 RXIN0
38 GNDRX
39 XTI
40 XTO
41 AGND
42 VCC
43 FILT
44 VCOM
45 AGNDAD
46 VCCAD
47 VINL
48 VINR
This is consistent with your pinout from the picture and the TI table.
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10. Most important corrections from the previous description
In the previous description it was confusing:
pin 10 MPIO_C3 / ADIN1
pin 8 MPIO_C1 / ABCKI1
pin 9 MPIO_C2 / ALRCKI1
Now we write it correctly:
pin 10 MPIO_C3, post-configuration function: AUXIN1_DATA / ADIN1
pin 8 MPIO_C1, function after configuration: AUXIN1_BCK / ABCKI1
pin 9 MPIO_C2, function after configuration: AUXIN1_LRCK / ALRCKI1
That is, for the PCB use the physical names MPIO_Cx and MPIO_Bx, and add the function after the slash as a logical description.
In the end for your project it stays like this:
RADIO from EVO3 -> AUXIN0, pins 28/29/30/31
BT I2S -> AUXIN1, pins 7/8/9/10
additional I2S -> AUXIN2, pins 11/12/13/14
SPDIF coax -> RXIN0/RXIN1, pins 37/35
SPDIF optical -> RXIN2/RXIN3, pins 33/32
output to DSP -> DOUT/LRCK/BCK, pins 17/18/19
i2C control -> SDA/SCL, pins 24/25
reset -> RST, pin 34
i2C mode -> MODE to GND, pin 27
You can already transfer this version to the PCB schematic.
Both TFTs together:
GPIO18 -> SCK / CLK
GPIO23 -> MOSI / SDA
GPIO22 -> DC / A0
GPIO17 -> RST / RES
3V3 -> VCC
GND -> GND
TFT left:
GPIO4 -> CS
TFT right:
GPIO5 -> CS