Good morning,
recently I noticed a certain incorrectness in the use of the programmer, so I would like to remind you of some basic rules when working with NAND memories:
- NAND memory is divided into blocks and pages
- pages are contiguous data spaces contained in a data block, for example a block consists of 64 pages, and a page contains 2112 bytes
- the factory NAND memory may have damaged data blocks (and this is normal), i.e. those to which data cannot be written, an attempt to write data to such a block fails, it does not "corrupt" the memory
- each memory page is divided into two logical data spaces, so-called: MainArea, where the size is defined as powers of two, i.e. e.g. 2048 bytes, and the so-called: SpareArea of different sizes, in which ECC correction data is stored. This division is basically contractual and provided by the manufacturer in the documentation. Both these areas are physically equally qualitatively efficient.
- a page in the NAND memory consists of bytes, and individual bytes - of bits, and individual bits may have a lower capacity to store data, as a result of which the memory may not be verified correctly after the recording, i.e. random bit errors may occur, they may also occur after the device memory has been used for an extended period. The manufacturer knows about it, that's why he introduced an additional SpareArea space, where you can place the result of special mathematical operations that allow you to locate a specific distorted bit and recreate it, usually the device in which it is installed is implemented.
- the manufacturer suggests what correction ability must have an algorithm of special mathematical operations (so-called ECC), i.e. how many bits may be distorted during reading,
- more than 1 bit can be stored in a particular NAND memory cell, therefore the type designations have been introduced: SLC, MLC, TLC etc.
- SLC is the best quality memory, 1 bit of memory is stored in one NAND memory cell, therefore memories of this type can be repeatedly erased and programmed and their number reaches up to 100,000 times, the disadvantage is unfortunately the low capacity
- MLC - the next generation of NAND memory, on the same silicon surface in one NAND memory cell can fit 2 bits of data. Unfortunately at the cost of something for something. The number of writes decreased to about 5,000 times, while the number of unstable bits increased, so the SpareArea area had to be enlarged to include more information for the bit correction system (ECC). The algorithm itself is more complicated, but it can correct 4-8 bits of distorted bits
- TLC, the next generation of NAND, the manufacturer said that if you could fit two bits, why not three? And yes, it also happened, 3 bits in the memory cell is a capacitive jump in the same volume of silicon, hence the memory of 16.32Gbit. Unfortunately, practically every page has corrupted bits here, the ECC system has something to do. Subscriptions dropped to around 500!
- at any time we can program any page in memory in any block
- with some exceptions (SLC, NOP> 1) we program the memory only once, if we want to re-program even the same content, we must necessarily delete it, otherwise errors will occur during verification
- before programming any page, it must be previously deleted, i.e. its content is the same logical "1"
- you cannot delete a single page, we always delete the entire block and this is a significant limitation
From the NANDLite programmer point of view - ALWAYS before writing the memory, ERASE the memory.
Am I flashing a ready-made programmer all the elements on the board, or do I need to flash atxmega without installing it on the board? Or so it should be stitched, but I can't, tell me how to fix it? Thank!